Method of manufacturing semiconductor device

Abstract

A method of manufacturing a semiconductor device is provided. The method of manufacturing a semiconductor device includes forming a first electrode layer on a substrate, and then forming a stack structure on the first electrode layer, wherein the stack structure comprises a first insulating layer, a gate electrode layer, and a second insulating layer. An opening is formed in the stack structure. A gate dielectric layer is formed on a sidewall of the opening of the stack structure, and an oxide semiconductor layer is formed in the opening, wherein the gate dielectric layer is sandwiched between the oxide semiconductor layer and the gate electrode layer. A second electrode layer is then formed on the stack structure to be in direct contact with the oxide semiconductor layer.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device, comprising:
 forming a first electrode layer on a substrate;   forming a stack structure on the first electrode layer, wherein the stack structure comprises a first insulating layer, a gate electrode layer, and a second insulating layer;   forming an opening in the stack structure;   forming a gate dielectric layer on a sidewall of the opening of the stack structure;   forming an oxide semiconductor layer in the opening, wherein the gate dielectric layer is sandwiched between the oxide semiconductor layer and the gate electrode layer; and   forming a second electrode layer on the stack structure to be in direct contact with the oxide semiconductor layer.   
     
     
         2 . The method of  claim 1 , wherein after the step of forming the second electrode layer further comprises: patterning the second insulating layer and the gate electrode layer. 
     
     
         3 . The method of  claim 1 , wherein after the step of forming the second electrode layer further comprises: forming a plurality of electrode contacts connecting to the first electrode layer, the gate electrode layer, and the second electrode layer respectively. 
     
     
         4 . The method of  claim 1 , wherein the step of forming the gate dielectric layer comprises:
 conformally depositing a dielectric material layer on the stack structure and in the opening; and   etching back the dielectric material layer until the first electrode layer is exposed.   
     
     
         5 . The method of  claim 1 , wherein the step of forming the stack structure comprises:
 depositing the first insulating layer on the first electrode layer;   depositing the gate electrode layer on the first insulating layer; and   depositing the second insulating layer on the gate electrode layer.   
     
     
         6 . The method of  claim 1 , wherein the step of forming the oxide semiconductor layer in the opening comprises:
 blanket depositing an oxide semiconductor material to fill the opening; and   etching back the oxide semiconductor material until the stack structure is exposed.   
     
     
         7 . The method of  claim 1 , wherein a method of forming the oxide semiconductor layer in the opening comprises a selective deposition process. 
     
     
         8 . The method of  claim 1 , wherein a material of the oxide semiconductor layer comprises indium-gallium-zinc oxide. 
     
     
         9 . The method of  claim 1 , wherein the substrate comprises a silicon-on-insulator (SOI) substrate.