US2023395606A1PendingUtilityA1

Method of making semiconductor device having buried bias pad

Assignee: TAIWAN SEMICONDUCTOR MFG CO LTDPriority: Jul 7, 2020Filed: Aug 10, 2023Published: Dec 7, 2023
Est. expiryJul 7, 2040(~13.9 yrs left)· nominal 20-yr term from priority
H10W 20/021H10W 20/20H10D 87/00H10D 86/01H10D 30/6734H10D 84/859H10D 84/0188H10D 84/0186H10D 84/0191H10D 84/038H10D 84/0193H10D 86/201H10D 84/853H01L 27/1203H01L 21/743H01L 21/84H01L 23/535H01L 27/1207
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Claims

Abstract

A method of making a semiconductor device includes manufacturing a bias layer over a buried oxide layer. The method further includes growing a layer of semiconductor material over the bias layer. The method further includes forming a transistor in the layer of semiconductor material, wherein the bias layer is between the transistor and a substrate. The method further includes forming a first deep trench isolation structure (DTI) extending through the layer of semiconductor material and contacting the substrate. The method further includes forming a first bias contact extending through the layer of the semiconductor material and electrically connecting to the bias layer. The method further includes forming a contact extending through the DTI to contact the substrate, wherein the contact is separated from the bias layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of making a semiconductor device, the method comprising:
 manufacturing a bias layer over a buried oxide layer;   growing a layer of semiconductor material over the bias layer;   forming a transistor in the layer of semiconductor material, wherein the bias layer is between the transistor and a substrate;   forming a first deep trench isolation structure (DTI) extending through the layer of semiconductor material and contacting the substrate;   forming a first bias contact extending through the layer of the semiconductor material and electrically connecting to the bias layer; and   forming a contact extending through the DTI to contact the substrate, wherein the contact is separated from the bias layer.   
     
     
         2 . The method of  claim 1 , further comprising manufacturing a second bias layer over the buried oxide layer. 
     
     
         3 . The method of  claim 2 , wherein manufacturing the second bias layer comprises manufacturing the second bias layer between the bias layer and the DTI. 
     
     
         4 . The method of  claim 2 , wherein manufacturing the bias layer comprises manufacturing the bias layer between the second bias layer and the DTI. 
     
     
         5 . The method of  claim 2 , further comprising forming a second bias contact extending through the layer of the semiconductor material and electrically connecting to the second bias layer. 
     
     
         6 . A method of making a semiconductor device, the method comprising:
 manufacturing a bias layer over a buried oxide layer;   growing a layer of semiconductor material over the bias layer;   forming a transistor in the layer of semiconductor material, wherein the bias layer is between the transistor and a substrate;   forming a first deep trench isolation structure (DTI) extending through the layer of semiconductor material and contacting the substrate; and   forming a first bias contact extending through the layer of semiconductor material and electrically connecting to the bias layer.   
     
     
         7 . The method of  claim 6 , further comprising forming a dielectric layer over the bias layer, wherein growing the layer of semiconductor material comprises growing the layer of semiconductor material over the dielectric layer. 
     
     
         8 . The method of  claim 6 , further comprising manufacturing a second bias layer over the buried oxide layer, wherein the second bias layer is spaced from the bias layer in a direction parallel to a top surface of the substrate. 
     
     
         9 . The method of  claim 8 , further comprising forming a second bias contact extending through the semiconductor layer and electrically connecting to the second bias layer. 
     
     
         10 . The method of  claim 9 , wherein forming the second bias contact comprises forming the second bias contact on an opposite side of the transistor from the first bias contact. 
     
     
         11 . The method of  claim 9 , wherein forming the second bias contact comprises forming the second bias contact on a same side of the transistor as the first bias contact. 
     
     
         12 . The method of  claim 8 , wherein forming the first DTI comprises forming the first DTI between the bias layer and the second bias layer. 
     
     
         13 . The method of  claim 8 , further comprising forming a second DTI between the bias layer and the second bias layer. 
     
     
         14 . The method of  claim 13 , wherein forming the second DTI comprises forming the second DTI underneath the transistor. 
     
     
         15 . The method of  claim 6 , wherein forming the transistor comprises forming a well region in the layer of semiconductor material, wherein the well region partially overlaps the bias layer. 
     
     
         16 . A method of making a semiconductor device, the method comprising:
 manufacturing a bias layer over a buried oxide layer;   growing a layer of semiconductor material over the bias layer;   forming a transistor in the layer of semiconductor material, wherein the bias layer is between the transistor and a substrate;   forming a first deep trench isolation structure (DTI) extending through the layer of semiconductor material and contacting the substrate; and   forming a contact extending through the DTI to contact the substrate, wherein the contact is separated from the bias layer.   
     
     
         17 . The method of  claim 16 , further comprising forming a bias contact extending through the layer of semiconductor material and electrically connecting to the bias layer. 
     
     
         18 . The method of  claim 17 , wherein forming the bias contact comprises forming the bias contact on an opposite side of the transistor from the contact. 
     
     
         19 . The method of  claim 17 , wherein forming the bias contact comprises forming the bias contact on a same side of the transistor as the contact. 
     
     
         20 . The method of  claim 17 , further comprising manufacturing a second bias layer over the buried oxide layer, wherein the second bias layer is between the bias layer and the contact.

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