US2023413435A1PendingUtilityA1

Article for power inverter and power inverter

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Assignee: EXRO TECH INCPriority: Dec 17, 2021Filed: Sep 5, 2023Published: Dec 21, 2023
Est. expiryDec 17, 2041(~15.4 yrs left)· nominal 20-yr term from priority
Inventors:Eric Hustedt
H05K 2201/10522H05K 2201/09409H05K 1/111H05K 1/181H05K 2201/09227H05K 2201/0979H05K 1/0263H02M 7/003H05K 2201/10166H02M 1/0054H02M 1/088H02M 7/5387H05K 1/025H05K 1/0257H05K 2201/097
72
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Claims

Abstract

An article for a power inverter, includes a multilayer printed circuit board having a first and second electrically conductive wiring layer and at least a first dielectric layer interposed between the first and second electrically conductive wiring layers. Each conductive wiring layer includes a common input and output line, the common input and output lines at least partially overlapping one another in a projection along a thickness of the multilayer printed circuit board. A set of input mounting pads is carried by the first common input line and a set of input mounting pads is carried by the second common input line, the input mounting pads of the second set of input mounting pads are interleaved with the input mounting pads of the first set of input mounting pads along a first axis. The article further includes a set output mounting pads carried by the common output line.

Claims

exact text as granted — not AI-modified
1 . A multilayer printed circuit board, comprising:
 a dielectric material and at least two conductor layers;   the conductor layers comprising:
 a plurality of individual mounting pads for high-side switches; 
 a plurality of individual mounting pads for low-side switches alternatingly interleaved with the plurality of individual mounting pads for high-side switches; 
 a first common input line for the high-side switches; and 
 a second common input line for the low-side switches, 
 wherein the first common input line and the second common input line at least partially overlap in a height direction of the printed circuit boards. 
   
     
     
         2 . The printed circuit board of  claim 1 , wherein the multilayer printed circuit board comprises the dielectric material and at least four conductor layers. 
     
     
         3 . The printed circuit board of  claim 2 , wherein the overlapping first and second common input lines are distributed on the at least four conductor layers. 
     
     
         4 . The printed circuit board of  claim 1 , wherein the first common input line and the second common input line completely overlap in the height direction of the printed circuit boards. 
     
     
         5 . An inverter comprising:
 a plurality of high-side switches;   a plurality of low-side switches alternatingly arranged with the plurality of high-side switches;   a multilayer printed circuit board comprising a dielectric material and at least two conductor layers;   the conductor layers comprising:
 a respective mounting pad for each of the plurality of high-side switches; 
 a respective mounting pad for each of the plurality of low-side switches alternatingly arranged with the respective mounting pads for each of the plurality of high-side switches; and 
 a first common input line for the plurality of high-side switches; and 
 a second common input line for the plurality of low-side switches, 
 wherein the first common input line and the second common input line at least partially overlap in a height direction of the printed circuit boards. 
   
     
     
         6 . The inverter of  claim 5 , wherein the multilayer printed circuit board comprises the dielectric material and at least four conductor layers. 
     
     
         7 . The inverter of  claim 6 , wherein the overlapping first and second common input lines are distributed on the at least four conductor layers. 
     
     
         8 . The inverter of  claim 7 , wherein the first common input line and the second common input line completely overlap in the height direction of the printed circuit boards. 
     
     
         9 . The inverter of  claim 7 , wherein the first and the second common input lines at least partially overlap one another in a projection along a thickness of the multilayer printed circuit board. 
     
     
         10 . The inverter of  claim 5 , wherein:
 the plurality of high-side switches comprise a first set of semiconductor switches, each of the semiconductor switches of the first set of semiconductor switches having a first node and a second node, the first node of the semiconductor switches of the first set electrically coupled to respective ones of one or more of input mounting pads of a first set of input mounting pads, and the second node of the semiconductor switches of the first set electrically coupled to respective ones of one or more of output mounting pads of a set of output mounting pads; and   the plurality of low-side switches comprise a second set of semiconductor switches, each of the semiconductor switches of the second set of semiconductor switches having a first node and a second node, the first node of the semiconductor switches of the second set electrically coupled to respective ones of one or more of input mounting pads of a second set of input mounting pads, and the second node of the semiconductor switches of the second set electrically coupled to respective ones of one or more of output mounting pads of a set of output mounting pads.   
     
     
         11 . The inverter of  claim 10 , wherein at least one of a first or a second electrically conductive wiring layer comprises a common output line, the common output line electrically isolated from the first and the second common input lines except via the semiconductor switches of the first and the second sets of semiconductor switches. 
     
     
         12 . The inverter of  claim 11 , wherein the multilayer printed circuit board comprises at least a third electrically conductive wiring layer, and at least a second dielectric layer interposed between the third and the first electrically conductive wiring layer and at least one of the first or the second electrically conductive wiring layers, the third electrically conductive wiring layer comprising a common output line which is electrically isolated from the first and the second common input lines except via the semiconductor switches of the first and the second sets of semiconductor switches. 
     
     
         13 . The inverter of  claim 10 , further comprising:
 a controller communicatively coupled to provide control signals to the semiconductor switches of the first and the second sets of semiconductor switches, the controller which provides control signals to places the semiconductor switches of the second set of semiconductor switches in an opposite state from the semiconductor switches of the first set of semiconductor switches.   
     
     
         14 . The inverter of  claim 10 , wherein the semiconductor switches of the first and the second sets of semiconductor switches are integrated gate bipolar transistors (IGBTs) or metal oxide semiconductor field effect transistors (MOSFETs).

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