Method of reducing voids and seams in trench structures by forming semi-amorphous polysilicon

Abstract

A microelectronic device with a trench structure is formed by forming a trench in a substrate, forming a seed layer in the trench, the seed layer including an amorphous dielectric material; and forming semi-amorphous polysilicon on the amorphous dielectric material. The semi-amorphous polysilicon has amorphous silicon regions separated by polycrystalline silicon. Subsequent thermal processes used in fabrication of the microelectronic device may convert the semi-amorphous polysilicon in the trench to a polysilicon core. In one aspect, the seed layer may be formed on sidewalls of the trench, contacting the substrate. In another aspect, a polysilicon outer layer may be formed in the trench before forming the seed layer, and the seed layer may be formed on the polysilicon layer.

What is claimed is: 
     
         1 . A method of forming a microelectronic device, comprising:
 providing a substrate having a top surface;   forming a trench in the substrate, the trench extending into the substrate from the top surface;   forming a seed layer in the trench, the seed layer including a dielectric material; and   forming semi-amorphous polysilicon on the dielectric material, the semi-amorphous polysilicon filling the trench inside the seed layer, wherein the semi-amorphous polysilicon has amorphous silicon regions, separated by polycrystalline silicon.   
     
     
         2 . The method of  claim 1 , wherein the semi-amorphous polysilicon includes 20 weight percent to 90 weight percent of the amorphous silicon regions. 
     
     
         3 . The method of  claim 1 , wherein the semi-amorphous polysilicon is formed by a chemical vapor deposition process using silane at a temperature of 555° C. to 580° C. 
     
     
         4 . The method of  claim 1 , wherein the dielectric material is formed by thermal oxidation of silicon. 
     
     
         5 . The method of  claim 1 , wherein the dielectric material is formed by a chemical vapor deposition process. 
     
     
         6 . The method of  claim 1 , wherein the dielectric material includes silicon dioxide, silicon nitride, silicon oxynitride, or a combination thereof. 
     
     
         7 . The method of  claim 1 , further comprising removing a portion of the seed layer at a bottom of the trench to expose the substrate, wherein the semi-amorphous polysilicon makes an electrical connection to the substrate at the bottom of the trench. 
     
     
         8 . The method of  claim 1 , further comprising forming a polysilicon outer layer in the trench prior to forming the seed layer, wherein the seed layer is formed on the polysilicon outer layer. 
     
     
         9 . The method of  claim 8 , wherein forming the seed layer includes thermal oxidation of silicon in the polysilicon outer layer. 
     
     
         10 . The method of  claim 8 , further comprising:
 forming a liner in the trench prior to forming the poly silicon outer layer; and   removing a portion of the liner at a bottom of the trench to expose the substrate, wherein the polysilicon outer layer makes an electrical connection to the substrate at the bottom of the trench.   
     
     
         11 . The method of  claim 1 , further comprising:
 heating the substrate to convert the semi-amorphous polysilicon to a polysilicon core contacting the dielectric material and filling the trench inside the seed layer, wherein the polysilicon core has silicon grains with an average size that is greater than half a minimum lateral dimension of the trench inside the seed layer.