US2024005449A1PendingUtilityA1

Robust frame size error detection and recovery mechanism to minimize frame loss for camera input sub-systems

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Assignee: TEXAS INSTRUMENTS INCPriority: Jan 2, 2020Filed: Sep 15, 2023Published: Jan 4, 2024
Est. expiryJan 2, 2040(~13.5 yrs left)· nominal 20-yr term from priority
G06T 3/4023G06V 10/32G06V 10/96G06V 10/993H04N 1/00021H04N 1/00034H04N 1/00005H04N 1/00082G06T 2207/10016
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Claims

Abstract

An image data frame is received from an external source. An error concealment operation is performed on the received image data frame in response to determining that a first frame size of the received image data frame is erroneous. The first frame size of the image data frame is determined to be erroneous based on at least one frame synchronization signal associated with the image data frame. An image processing operation is performed on the received image data frame on which the error concealment operation has been performed, thereby enabling an image processing module to perform the image processing operation without entering into a deadlock state and thereby prevent a host processor from having to execute hardware resets of deadlocked modules.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An image processing device, comprising:
 an image data receiver configured to receive an image data frame, the image data receiver including an error detector configured to detect whether a size of the image data frame is erroneous;   an error handler coupled to, and configured to receive from, the error detector a current image data frame, the error handler configured to:
 perform frame level error operations on the current image data frame to generate a corrected image frame, the frame level error operations including detecting a size violation with respect to the current image data frame based on a comparison of received first, second, third, and fourth signals and expected first, second, third, and fourth signals, in which:
 the expected first signal is active while the error handler receives a first pixel of an image data frame, 
 the expected second signal is active while the error handler receives a last pixel of an image data frame, 
 the expected third signal is active while the error handler receives a first pixel of each of a plurality of lines including the first line of an image data frame, and 
 the expected fourth signal is active while the error handler receives a last pixel of each of the plurality of lines including the last line of an image data frame; and 
 
   an image processor coupled to receive from the error handler the corrected image data frame.   
     
     
         2 . The image processing device of  claim 1 , wherein the error handler is configured to detect a size violation with respect to the current image data frame when one or more of the following occurs:
 the received second signal is active while the error handler receives the last pixel of the current image data frame and the received fourth signal is not active while the error handler receives the last line of the current image data frame, and   the received first signal is active while the error handler receives the first pixel of the current image data frame and the received third signal is not active while the error handler receives the first pixel of the first line of the current image data frame.   
     
     
         3 . The image processing device of  claim 1 , wherein the error handler is configured to detect a size violation with respect to the current image data frame when at least one of the following occurs:
 the received second signal was not active when the error handler received the last pixel of an immediate previous image data frame, and   the received first signal is not active while the error handler receives the first pixel of the current image data frame.   
     
     
         4 . The image processing device of  claim 1 , wherein the error handler is configured to detect a size violation with respect to the current image data frame when at least one of the following occurs:
 the received fourth signal was not active while the error handler receives a last pixel of each of the plurality of lines including the last line of an image data frame, and   the received fourth signal is not active while the error handler receives the first pixel of the first line of the current image data frame.   
     
     
         5 . The image processing device of  claim 1 , wherein the error handler is configured to detect a size violation with respect to the current image data frame when at least one of the following occurs:
 the received fourth signal was not active while the error handler received a last pixel of a line of the plurality of lines of the current image data frame, and   the received fourth signal is not active while the error handler receives a last pixel of a next line immediately following the line of the plurality of lines of the current image data frame.   
     
     
         6 . The image processing device of  claim 1 , wherein the error handler is configured to detect a size violation with respect to the current image data frame when at least one of the following occurs:
 the received second signal was not active while the error handler receives a last pixel of an immediate previous image data frame, and   the received second signal is not active while the error handler receives a last pixel of the current image data frame.   
     
     
         7 . The image processing device of  claim 2 , wherein the error handler is further configured to interrupt a host processor in response to detecting a size violation with respect to the current image data frame. 
     
     
         8 . The image processing device of  claim 1 , wherein, in response to detecting that the frame size of the image data frame is erroneous, the error detector is further configured to determine that the image data frame is larger than a reference size, and in response, discard data of a portion of the image data frame to generate the current image data frame. 
     
     
         9 . The image processing device of  claim 8 , wherein the reference size includes an expected line width. 
     
     
         10 . The image processing device of  claim 2 , wherein in response to detecting a size violation, the error handler is further configured to conceal the size violation and maintain a frame size expected by the image processor. 
     
     
         11 . The image processing device of  claim 10 , wherein the error handler is further configured to perform one of:
 undersized processing when the error detector detected that the size of the image data frame is undersized, and   oversized processing when the error detector detected that the size of the image data frame is oversized.   
     
     
         12 . The image processing device of  claim 11 , wherein the error handler is further configured to issue an interrupt to a host processor indicating a frame size error with respect to the image frame data. 
     
     
         13 . An image processing device, comprising:
 an image data receiver configured to receive an image data frame, the image data receiver including an error detector configured to detect whether a size of the image data frame is erroneous; and   an error handler coupled to, and configured to receive from, the error detector a current image data frame, the error handler configured to perform line level error operations on the current image data frame, including fetching data of lines of the current image data frame line-by-line, and for each fetched line:
 compare multiple received synchronization signals to expected synchronization signals to determine whether at least one of the multiple synchronization signals exhibits an improper transition or is not received, 
 compare an actual length of the line to a reference length, and 
 perform line error handling when the actual length of the line is determined to be different than the reference length based on the compare operation to generate a corrected line, the line error handling including concealing the line size error from a downstream image processor coupled to the error handler. 
   
     
     
         14 . The image processing device of  claim 13 , wherein the line level error operations which the error handler is configured to perform further include:
 flag the current image data frame in response to the error handler determining that at least one of the multiple synchronization signals exhibits an improper transition or is not received.   
     
     
         15 . The image processing device of  claim 14 , wherein the line level error operations which the error handler is configured to perform further include:
 flag the current image data frame in response to the error handler performing line error handling.   
     
     
         16 . The image processing device of  claim 15 , wherein the error handler is further configured to:
 issue an interrupt to a host processor based on the flag of the current image data frame, after all of the lines of the current image data frame have been processed.   
     
     
         17 . The image processing device of  claim 16 , wherein the error handler is further configured to transmit to the host processor error information regarding the current image data frame. 
     
     
         18 . The image processing device of  claim 17 , wherein the error information includes location information indicating which line or lines of the current image data frame are faulty. 
     
     
         19 . The image processing device of  claim 17 , wherein the error information includes a confidence level with respect to the current image data frame.

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