US2024006295A1PendingUtilityA1

Electronic device and manufacturing method thereof

66
Assignee: INNOLUX CORPPriority: Oct 19, 2021Filed: Sep 13, 2023Published: Jan 4, 2024
Est. expiryOct 19, 2041(~15.3 yrs left)· nominal 20-yr term from priority
H10W 70/6528H10W 70/685H10W 70/09H10W 70/05H10W 70/093H10W 70/60H10W 70/614H10W 90/701H10W 70/65H01L 23/49838H01L 21/4857H01L 24/20H01L 24/19H05K 1/11H05K 1/0268H01L 2224/214H01L 23/49822H01L 2224/19H05K 2201/09372H05K 1/111H05K 2201/0347H05K 2201/0338H05K 3/30H05K 3/06
66
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A manufacturing method of electronic components includes the steps of: providing an insulating layer including a first region and a second region; providing a first metal layer disposed in the first region of the insulating layer; providing a second metal layer disposed on the first metal layer; providing a metal line in the second region of the insulating layer, wherein the metal line is electrically connected to the first metal layer; and removing the metal line to form an electronic component, wherein the electronic component includes the insulating layer; and a first metal bump disposed on the insulating layer and including: the first metal layer disposed on the insulating layer; and the second metal layer disposed on the first metal layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A manufacturing method of an electronic component, comprising the steps of:
 providing an insulating layer including a first region and a second region;   providing a first metal layer disposed in the first region of the insulating layer;   providing a second metal layer disposed on the first metal layer;   providing a metal line in the second region of the insulating layer, wherein the metal line is electrically connected to the first metal layer; and   removing the metal line to form an electronic component, wherein the electronic component includes the insulating layer; and a first metal bump disposed on the insulating layer and including:   the first metal layer disposed on the insulating layer; and   the second metal layer disposed on the first metal layer.   
     
     
         2 . The method of  claim 1 , wherein, after the step of providing a metal line in the second region of the insulating layer, the metal line disposed in the second region of the insulating layer is used as an auxiliary circuit by which an electrical test instrument is used to test the electronic component. 
     
     
         3 . The method of  claim 1 , wherein the electronic component further includes a second metal bump disposed on the insulating layer, wherein before the step of removing the metal line, a first metal line segment of the metal line is electrically connected to the first metal layer of the first metal bump, and a second metal line segment of the metal line is electrically connected to the second metal bump. 
     
     
         4 . The method of  claim 1 , further comprising a step of forming a third metal layer disposed on the second metal layer before the step of providing the metal line. 
     
     
         5 . The method of  claim 1 , further comprising a step of providing a third metal bump, wherein the third metal bump is electrically connected to the first metal layer. 
     
     
         6 . The method of  claim 1 , further comprising a step of providing a chip electrically connected to the first metal layer.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.