Semiconductor package including a high voltage semiconductor die and a gate driver semiconductor die, and method of producing the semiconductor package
Abstract
A semiconductor package includes a substrate, a high voltage semiconductor die attached to an electrically conductive part of the substrate, and a gate driver semiconductor die attached, by an electrically insulative die attach material, to the electrically conductive part of the substrate or to a side of the high voltage semiconductor die that faces away from the substrate. The gate driver semiconductor die includes a semiconductor body and a polymer material covering a backside of the semiconductor body. The polymer material is interposed between the semiconductor body and the die attach material such that the semiconductor body is electrically insulated from the substrate or the side of the high voltage semiconductor die that faces away from the substrate by an insulator stack that includes both the polymer material and the die attach material. A method of producing the semiconductor package also is described.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor package, comprising:
a substrate; a high voltage semiconductor die attached to an electrically conductive part of the substrate; and a gate driver semiconductor die attached, by an electrically insulative die attach material, to the electrically conductive part of the substrate or to a side of the high voltage semiconductor die that faces away from the substrate, wherein the gate driver semiconductor die comprises a semiconductor body and a polymer material covering a backside of the semiconductor body, wherein the polymer material is interposed between the semiconductor body and the die attach material such that the semiconductor body is electrically insulated from the substrate or the side of the high voltage semiconductor die that faces away from the substrate by an insulator stack that comprises both the polymer material and the die attach material.
2 . The semiconductor package of claim 1 , further comprising:
a mold compound encapsulating the high voltage semiconductor die and the gate driver semiconductor die.
3 . The semiconductor package of claim 1 , wherein the polymer material has a thickness of at least 25 μm.
4 . The semiconductor package of claim 3 , wherein the thickness of the polymer material is in a range of 25 μm to 50 μm.
5 . The semiconductor package of claim 1 , wherein the polymer material is thicker than the die attach material.
6 . The semiconductor package of claim 1 , wherein the polymer material has a dielectric strength greater than 25 kV/mm.
7 . The semiconductor package of claim 1 , wherein the insulator stack has a breakdown voltage greater than 3 kV.
8 . The semiconductor package of claim 1 , wherein the polymer material is an epoxy or a polyimide.
9 . The semiconductor package of claim 1 , wherein the die attach material is a die attach film or an epoxy adhesive.
10 . The semiconductor package of claim 1 , wherein the substrate is a lead frame, wherein both the gate driver semiconductor die and the high voltage semiconductor die are attached to a die paddle of the lead frame, and wherein the semiconductor body of the gate driver semiconductor die is electrically insulated from the die paddle by both the polymer material and the die attach material.
11 . The semiconductor package of claim 1 , wherein the substrate is a lead frame, wherein the high voltage semiconductor die is attached to a die paddle of the lead frame, wherein the gate driver semiconductor die is attached to the side of the high voltage semiconductor die that faces away from the die paddle, and wherein the semiconductor body of the gate driver semiconductor die is electrically insulated from the high voltage semiconductor die by both the polymer material and the die attach material.
12 . The semiconductor package of claim 1 , wherein the substrate comprises a ceramic body, wherein the electrically conductive part of the substrate is a segment of a patterned metallization formed on the ceramic body, wherein both the gate driver semiconductor die and the high voltage semiconductor die are attached to the segment of the patterned metallization, and wherein the semiconductor body of the gate driver semiconductor die is electrically insulated from the segment of the patterned metallization by both the polymer material and the die attach material.
13 . The semiconductor package of claim 1 , wherein the substrate is a laminate, wherein the electrically conductive part of the substrate is a segment of a patterned metallization formed on the laminate, wherein both the gate driver semiconductor die and the high voltage semiconductor die are attached to the segment of the patterned metallization, and wherein the semiconductor body of the gate driver semiconductor die is electrically insulated from the segment of the patterned metallization by both the polymer material and the die attach material.
14 . The semiconductor package of claim 1 , wherein an edge of the gate driver semiconductor die tapers inward.
15 . The semiconductor package of claim 1 , wherein the high voltage semiconductor die is a microcontroller die for a high voltage transistor or is a discrete high voltage transistor die.
16 . The semiconductor package of claim 1 , wherein the polymer material comprises a different material than the die attach material.
17 . A method of producing a plurality of semiconductor packages, the method comprising:
forming a gate driver circuit at a plurality of die locations in a semiconductor wafer; thinning a backside of the semiconductor wafer; covering the thinned backside of the semiconductor wafer with a polymer material; singulating the semiconductor wafer with the polymer material into a plurality of gate driver semiconductor dies; and for each gate driver semiconductor die:
attaching a high voltage semiconductor die to an electrically conductive part of a substrate; and
attaching, by an electrically insulative die attach material, the gate driver semiconductor die to the electrically conductive part of the substrate or to a side of the high voltage semiconductor die that faces away from the substrate,
wherein the polymer material is interposed between a semiconductor body of the gate driver semiconductor die and the die attach material such that the semiconductor body is electrically insulated from the substrate or the side of the high voltage semiconductor die that faces away from the substrate by an insulator stack that comprises both the polymer material and the die attach material.
18 . The method of claim 17 , wherein the singulating comprises:
attaching the thinned backside of the semiconductor wafer with the polymer material to a temporary carrier by a die attach film or epoxy adhesive; cutting through the semiconductor wafer along dicing streets which delimit the die locations using a first blade having a first width; and cutting through both the polymer material and the die attach film or epoxy adhesive along the dicing streets using a second blade having a second width that is less than the first width.
19 . The method of claim 18 , wherein the cutting using the first blade tapers inward an edge of each gate driver semiconductor die.
20 . The method of claim 18 , wherein the die attach film or epoxy adhesive remains on the polymer material of the gate driver semiconductor dies after the singulating and forms the electrically insulative die attach material.Join the waitlist — get patent alerts
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