US2024222546A1PendingUtilityA1

Manufacturing method for high-voltage led chip

Assignee: FOCUS LIGHTINGS TECH CO LTDPriority: Jan 18, 2022Filed: Feb 16, 2022Published: Jul 4, 2024
Est. expiryJan 18, 2042(~15.5 yrs left)· nominal 20-yr term from priority
H10H 20/034H10H 20/032H10H 20/841H10H 20/833H10H 20/825H10H 20/819H10H 20/812H10H 20/01335H10H 20/84H10H 20/01H10H 20/80H10H 20/0137H01L 2933/0025H01L 2933/0016H01L 33/46H01L 33/42H01L 33/32H01L 33/20H01L 33/06H01L 33/007
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Claims

Abstract

The present application provides a manufacturing method for a high-voltage LED chip. The sapphire substrate PSS in the embodiments of the present application has a double-layer structure with an upper layer and a lower layer, the upper layer being silicon oxide (SiO 2 ), and the lower layer being sapphire Al 2 O 3 . Before making the sapphire Al 2 O 3 patterned, a layer of silicon oxide (SiO 2 ) is deposited on the sapphire Al 2 O 3 , and then the sapphire substrate PSS is made by dry etching, and the substrate is used to fabricate the high-voltage LED chip. After etching and bridging the isolation groove by the inductively coupled plasma ICP, the sapphire substrate PSS is corroded. The silicon oxide (SiO 2 ) above the sapphire Al 2 O 3 is removed. A flat platform is formed at the isolation groove of the high-voltage LED chip, which is convenient to subsequently cover the bridging metal, thereby solving the problems such as bridging metal fractures.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A manufacturing method for a high-voltage LED chip, comprising:
 acquiring a preset substrate, wherein the preset substrate comprises sapphire Al 2 O 3 ;   forming a layer of silicon oxide (SiO 2 ) on a surface layer of the sapphire Al 2 O 3 ;   photoetching a sapphire substrate PSS, wherein the sapphire substrate PSS comprises an upper layer and a lower layer, the upper layer being the silicon oxide (SiO 2 ), and the lower layer being the sapphire Al 2 O 3 ;   bridging an isolation groove by an inductively coupled plasma process, and then etching through all epitaxies of the isolation groove so as to expose the sapphire substrate PSS;   corroding the sapphire substrate PSS to remove the silicon oxide (SiO 2 ) on the upper layer so that the sapphire substrate PSS forms a platform structure; and   generating a high-voltage LED chip based on the platform structure according to preset requirements.   
     
     
         2 . The manufacturing method for a high-voltage LED chip according to  claim 1 , wherein forming the layer of silicon oxide (SiO 2 ) on the surface layer of the sapphire Al 2 O 3  comprises:
 forming the layer of silicon oxide (SiO 2 ) on the surface layer of the sapphire Al 2 O 3  by a preset deposition mode;   wherein the preset deposition mode comprises ion assisted deposition, sputter deposition, and plasma-enhanced chemical vapor deposition.   
     
     
         3 . The manufacturing method for a high-voltage LED chip according to  claim 1 , wherein corroding the sapphire substrate PSS to remove the silicon oxide (SiO 2 ) on the upper layer comprises:
 soaking the sapphire substrate PSS with a buffered oxide etchant (BOE), wherein the soaking time is in the range of 3 to 30 minutes; and   after the soaking is completed, the silicon oxide (SiO 2 ) is removed by the buffered oxide etchant (BOE) so that the sapphire substrate PSS forms a platform structure.   
     
     
         4 . The manufacturing method for a high-voltage LED chip according to  claim 1 , further comprising:
 depositing a layer of silicon oxide (SiO 2 ) or silicon nitride (SiNx) on a surface of the high-voltage LED chip by plasma-enhanced chemical vapor deposition, and patterning deposited high-voltage LED chip by photoetching and wet etching.   
     
     
         5 . The manufacturing method for a high-voltage LED chip according to  claim 1 , further comprising:
 depositing a layer of a transparent conductive layer on the surface of the high-voltage LED chip by sputter deposition or reactive plasma deposition (RPD) process, a thickness of the conductive layer being 10 to 300 nm; and   removing excess portions of the transparent conductive layer by photoetching and wet etching, wherein the excess portion is determined by the high-voltage LED chip and user requirements.   
     
     
         6 . The manufacturing method for a high-voltage LED chip according to  claim 1 , further comprising: etching an N-type gallium nitride on an epitaxial wafer of the high-voltage LED chip to expose the N-type gallium nitride. 
     
     
         7 . The manufacturing method for a high-voltage LED chip according to  claim 1 , further comprising: fabricating a metal electrode by electron beam evaporation, wherein materials of the metal electrode comprise chromium (Cr), titanium (Ti), aluminum (Al), silver (Ag), nickel (Ni), platinum (Pt), and gold (Au), and the thickness of the metal electrode is in the range of 1 to 5 microns. 
     
     
         8 . The manufacturing method for a high-voltage LED chip according to  claim 1 , comprising cutting, spot measurement, automatic optical inspection (AOI) and sorting. 
     
     
         9 . The manufacturing method for a high-voltage LED chip according to  claim 1 , further comprising: plating the surface of the high-voltage LED chip with a silicon oxide (SiO 2 ) or titanium dioxide (TiO 2 ) stack layer by plasma assisted deposition, so that the surface of the high-voltage LED chip forms a Bragg reflector to improve brightness of the high-voltage LED chip. 
     
     
         10 . The manufacturing method for a high-voltage LED chip according to  claim 1 , further comprising: grinding the high-voltage LED chip to thin the high-voltage LED chip to a target thickness.

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