Display device

Abstract

A display device includes: a plurality of pixels each including a driving thin film transistor and a storage capacitor, wherein each of the pixels further includes: a driving semiconductor layer including a driving channel region, a driving source region, and a driving drain region; a first electrode layer, a portion of the first electrode layer overlapping the driving channel region; a second electrode layer overlapping the first electrode layer; a node connection line having a first side connected to the first electrode layer; a pixel electrode overlapping the first electrode layer and the second electrode layer; and a shielding layer between the first electrode layer and the pixel electrode and overlapping the first electrode layer, the node connection line, and the pixel electrode.

What is claimed is: 
     
         1 . A display device comprising:
 a first transistor comprising a first semiconductor layer and a first gate electrode;   a storage capacitor overlapping the first semiconductor layer and comprising a first electrode and a second electrode on the first electrode;   a data line extending in a first direction;   a second transistor electrically connected to the data line, the second transistor comprising a second semiconductor layer and a second gate electrode;   a third transistor electrically connected to the first transistor, the third transistor comprising a third semiconductor layer and a third gate electrode;   a fourth transistor comprising a fourth semiconductor layer and a fourth gate electrode, the fourth semiconductor layer electrically connected to the third semiconductor layer and the first gate electrode;   an initialization voltage line extending in a second direction different from the first direction, the initialization voltage line electrically connected to the fourth semiconductor layer;   a light emitting diode comprising a pixel electrode, an opposite electrode, and an emission layer between the pixel electrode and the opposite electrode; and   a driving voltage line, wherein the driving voltage line comprises:
 a first part extending in the first direction; and 
 a second part protruding from the first part and extending along the second direction. 
   
     
     
         2 . The display device of  claim 1 , wherein a part of the driving voltage line overlaps the third gate electrode and the fourth gate electrode. 
     
     
         3 . The display device of  claim 1 , wherein third semiconductor layer and the fourth semiconductor layer comprise an oxide semiconductor. 
     
     
         4 . The display device of  claim 3 , wherein the third semiconductor layer is integrated with the fourth semiconductor layer. 
     
     
         5 . The display device of  claim 1 , further comprises a node connection line electrically connected to a first gate electrode of the first transistor and the third semiconductor layer of the third transistor. 
     
     
         6 . The display device of  claim 1 , wherein the first semiconductor comprises a polycrystalline silicon. 
     
     
         7 . A display device comprising;
 a plurality of transistors electrically connected to each other, wherein one of the plurality of transistors comprises two gate electrodes; and   a light emitting diode electrically connected to the plurality of transistors, the light emitting diode comprising a pixel electrode, an opposite electrode, and an emission layer between the pixel electrode and the opposite electrode,
 wherein a plurality of transistors comprises: 
   a first transistor comprising a first semiconductor layer and a first gate electrode overlapping a first channel region of the first semiconductor layer;   a second transistor electrically connected to a data line extending in a first direction, the second transistor comprising a second semiconductor layer and a second gate electrode overlapping a second channel region of the second semiconductor layer;   a third transistor electrically connected to the first transistor, the third transistor comprising a third semiconductor layer and a third gate electrode overlapping a third channel region of the third semiconductor layer; and   a fourth transistor electrically connected to an initialization voltage line extending in a second direction crossing the first direction, the fourth transistor comprising a fourth semiconductor layer and a fourth gate electrode overlapping a fourth channel region of the fourth semiconductor layer, and   wherein a driving voltage line is electrically connected to the first transistor, wherein the driving voltage line comprises:
 a first part extending in the first direction; and 
 a second part protruding from the first part and extending along the second direction. 
   
     
     
         8 . The display device of  claim 7 , wherein the third semiconductor layer is integrated with the fourth semiconductor layer. 
     
     
         9 . The display device of  claim 8 , wherein third semiconductor layer and the fourth semiconductor layer comprise an oxide semiconductor. 
     
     
         10 . The display device of  claim 7 , wherein the first semiconductor comprises a polycrystalline silicon. 
     
     
         11 . The display device of claim  11 , further comprises a node connection line electrically connected to a first gate electrode of the first transistor and the third semiconductor layer of the third transistor. 
     
     
         12 . The display device of  claim 11 , further comprising a storage capacitor, wherein the storage capacitor overlaps the first semiconductor layer and comprises a first electrode and a second electrode on the first electrode. 
     
     
         13 . The display device of  claim 12 , wherein:
 the first gate electrode and the first electrode are integrated with each other, the second electrode comprises an opening overlapping a portion of the first gate electrode, and   a first portion of the node connection line is electrically connected to the portion of the first gate electrode via the opening.   
     
     
         14 . The display device of  claim 7 , wherein a part of the driving voltage line overlaps the third gate electrode and the fourth gate electrode.