Electronic metadevice

Abstract

Electronic metadevice comprising a conductive channel; a metal layer superposed on the conductive channel; and a barrier layer located between the metal layer and the conductive channel. The metal layer includes at least one recess extending through the metal layer to define at least one metallic metastructure comprising at least one first metal layer portion adjacent to at least one second metal layer portion. The recess extends through the metal layer to define a micro-structured or a nano-structured first metal layer portion comprising at least one first metallic extension or finger extending away from a first support of the first metal layer portion towards the second metal layer portion; and a micro-structured or a nano-structured at least one second metal layer portion comprising at least one second metallic extension or finger extending away from a second support of the second metal layer portion towards the first metal layer portion.

1 - 49 . (canceled) 
     
     
         50 . An electronic metadevice comprising
 at least one conductive channel configured to provide charge carriers;   at least one metal layer superposed on the at least one conductive channel; and   a barrier layer located between the at least one metal layer and the at least one conductive channel;   
       wherein the at least one metal layer includes at least one recess extending through the at least one metal layer to define at least one metallic metastructure comprising at least one first metal layer portion adjacent to at least one second metal layer portion; and 
       wherein the at least one recess extends through the at least one metal layer to define (i) a micro-structured or a nano-structured at least one first metal layer portion comprising at least one first metallic finger extending away from a first support of the at least one first metal layer portion towards the at least one second metal layer portion; and (ii) a micro-structured or a nano-structured at least one second metal layer portion comprising at least one second metallic finger extending away from a second support of the at least one second metal layer portion towards the at least one first metal layer portion; the at least one first metallic finger being located adjacent to the at least one second metallic finger. 
     
     
         51 . The electronic metadevice according to  claim 50 , wherein the at least one recess extends through the at least one metal layer to define (i) a plurality of first metallic fingers extending away from the first support of the at least one first metal layer portion towards the at least one second metal layer portion; and (ii) a plurality of second metallic fingers extending away from the second support of the at least one second metal layer portion towards the at least one first metal layer portion ( 11 A); the first metallic fingers ( 17 A) being located adjacent to the second metallic fingers ( 17 B). 
     
     
         52 . The electronic metadevice according to  claim 50 , wherein the at least one recess extends through the at least one metal layer to define (i) a micro-structured or a nano-structured at least one first metal layer portion comprising a plurality of first metallic fingers; and (ii) a micro-structured or a nano-structured at least one second metal layer portion comprising at least one second metallic extension; the first metallic finger being located adjacent to the second metallic finger. 
     
     
         53 . The electronic metadevice according to  claim 50 , wherein the at least one recess extends through the at least one metal layer in a winding or meandering manner to define a plurality of interleaving metallic fingers separated by the at least one recess. 
     
     
         54 . The electronic metadevice according to  claim 50 , wherein the barrier layer is a current barrier configured to restrict or prevent current flow therethrough during operation of the semiconductor device. 
     
     
         55 . The electronic metadevice according to  claim 50 , wherein the barrier layer is configured to assure a strong electric field coupling between the at least one metal layer and the at least one conductive channel. 
     
     
         56 . The electronic metadevice according to  claim 50 , wherein the at least one metal layer and the barrier layer are configured to support transverse magnetic modes that interact with the at least one metal layer to permit current density confinement. 
     
     
         57 . The electronic metadevice according to  claim 50 , wherein the barrier layer has a thickness supporting subwavelength transverse magnetic modes that interact with the at least one metal layer to permit current density confinement. 
     
     
         58 . The electronic metadevice according to  claim 50 , wherein the at least one recess extends through the at least one metal layer to define at least one metallic finger ( 17 A) of the at least one first metal layer portion and at least one depression of the at least one second metal layer portion, the at least one metal finger being surrounded by the at least one depression. 
     
     
         59 . The electronic metadevice according to  claim 50 , wherein the at least one recess extends to define a plurality of metallic fingers of the at least one first metal layer portion and a plurality of depressions of the at least one second metal layer portion, the metal fingers being surrounded by the depressions. 
     
     
         60 . The electronic metadevice according to the  claim 59 , wherein the at least one recess extends through the at least one metal layer to define at least one metallic finger of the at least one second metal layer portion and at least one depression of the at least one first metal layer portion, the at least one metal finger being surrounded by the at least one depression. 
     
     
         61 . The electronic metadevice according to  claim 60 , wherein the at least one recess extends to define a plurality of metallic fingers of the at least one second metal layer portion and a plurality of depressions of the at least one first metal layer portion, the metal fingers being surrounded by the depressions. 
     
     
         62 . The electronic metadevice according to  claim 50 , wherein the first and second metal layer portions comprise a plurality of interleaving metallic fingers separated by the at least one recess. 
     
     
         63 . The electronic metadevice according to  claim 50 , wherein the at least one recess defines a separation gap distance g between the at least one first metal layer portion and the at least one second metal layer portion. 
     
     
         64 . The electronic metadevice according to  claim 63 , wherein the separation gap distance g is substantially the same as the at least one recess extends through the at least one metal layer to define the at least one first metal layer portion and the at least one second metal layer portion. 
     
     
         65 . The electronic metadevice according to  claim 50 , wherein the at least one recess extends fully through the at least one metal layer. 
     
     
         66 . The electronic metadevice according to  claim 50 , wherein the first metal layer portion is separated or fully separated from the second metal layer portion by the at least one recess. 
     
     
         67 . The electronic metadevice according  claim 50 , wherein the first metal layer portion is solely indirectly in physical contact with the second metal layer portion via barrier layer. 
     
     
         68 . The electronic metadevice according to  claim 50 , wherein the at least one conductive channel is defined by a semiconductor heterojunction defined by at least one first semiconductor material and at least one second semiconductor material. 
     
     
         69 . The electronic metadevice according to  claim 50 , including a plurality of input ports, and at least one or a plurality of output ports, and
 wherein the plurality of input ports is configured to apply multiple voltages to the semiconductor device to control a signal transmission between input and output ports.