Voltage converter with average input current control and input-to-output isolation

Abstract

A circuit includes a comparator circuit having a first input, a second input, a first output and a second output. The circuit also includes the first input configured to receive an input voltage of a power supply circuit and the second input configured to receive an output voltage of the power supply circuit. Additionally, the circuit includes the first output to provide the larger of the input voltage or the output voltage and the second output to provide a logic low signal responsive to the input voltage being less than the output voltage, and to provide a logic high signal responsive to the input voltage being greater than or equal to the output voltage.

What is claimed is: 
     
         1 . A circuit comprising:
 a comparator circuit having a first input, a second input, a first output and a second output;   the first input configured to receive an input voltage of a power supply circuit;   the second input configured to receive an output voltage of the power supply circuit;   the first output to provide the larger of the input voltage or the output voltage; and   the second output to provide a logic low signal responsive to the input voltage being less than the output voltage, and to provide a logic high signal responsive to the input voltage being greater than or equal to the output voltage.   
     
     
         2 . The circuit of  claim 1 , further comprising a driver circuit having a first input and a second input, the first input coupled to the first output of the comparator circuit and the second input coupled to the second output of the comparator circuit. 
     
     
         3 . The circuit of  claim 2 , further comprising a transistor having a first current terminal, a second current terminal, and a control terminal, the first current terminal coupled to the first input of the comparator circuit, the second current terminal coupled to the second input of the comparator circuit, and the control terminal coupled to an output of the driver circuit. 
     
     
         4 . The circuit of  claim 2 , wherein the driver circuit comprises:
 a logic gate having an input terminal and an output terminal, the input terminal coupled to the first input of the driver circuit; and   a switch having a current terminal and a control terminal, the control terminal coupled to the output terminal of the logic gate, and the current terminal coupled to an output of the driver circuit.   
     
     
         5 . The circuit of  claim 4 , wherein the driver circuit further comprises a transistor having a first current terminal, a second current terminal, and a control terminal, the first current terminal coupled to a third input of the driver circuit, the third input of the driver circuit coupled to the first input of the comparator circuit, the second current terminal coupled to the output of the driver circuit, and the control terminal coupled to the second input of the driver circuit. 
     
     
         6 . The circuit of  claim 4 , wherein the switch is a first switch, the driver circuit further comprising a second switch having a current terminal and a control terminal, the current terminal coupled to the current terminal of the first switch, and wherein the control terminal is configured to receive an inverse of a signal at the output terminal of the logic gate. 
     
     
         7 . The circuit of  claim 1 , further comprising:
 a current sense circuit having a first input, a second input, and an output, the first input coupled to the first input of the comparator circuit, the second input coupled to the second input of the comparator circuit; and   a current amplifier having an input coupled to the output of the current sense circuit.   
     
     
         8 . The circuit of  claim 7 , wherein the current sense circuit comprises:
 a first transistor having a first current terminal, a second current terminal, and a control terminal, the first current terminal coupled to the second input of the current sense circuit;   an operational amplifier having a first input terminal, a second input terminal, and an output terminal, the first input terminal coupled to the second current terminal of the first transistor, and the second input terminal coupled to the first input of the current sense circuit;   a second transistor having a first current terminal, a second current terminal, and a control terminal, the second current terminal coupled to the second current terminal of the first transistor and the control terminal coupled to the output terminal of the operational amplifier; and   a current mirror coupled to the first current terminal of the second transistor and to the output of the current sense circuit.   
     
     
         9 . A circuit comprising:
 an inductor having a first terminal and a second terminal;   a transistor having a control terminal, a first current terminal, and a second current terminal, the first current terminal coupled to the second terminal of the inductor;   a driver circuit having a first input, a second input, and an output, the output coupled to the control terminal of the transistor; and   a comparator circuit having a first input, a second input, a first output, and a second output, the first input coupled to the first terminal of the inductor, the second input coupled to the second current terminal of the transistor, the first output coupled to the first input of the driver circuit, and the second output coupled to the second input of the driver circuit.   
     
     
         10 . The circuit of  claim 9 , wherein the comparator circuit is configured to:
 receive a first signal at the first input;   receive a second signal at the second input;   produce the larger of the first signal or the second signal at the first output; and   produce a logic low signal at the second output responsive to the first signal being less than the second signal, and to produce a logic high signal at the second output responsive to the first signal being greater than or equal to the second signal.   
     
     
         11 . The circuit of  claim 9 , wherein the comparator circuit is configured to produce an analog signal at the first output and to produce a digital signal at the second output. 
     
     
         12 . The circuit of  claim 9 , further comprising:
 a current sense circuit coupled to the first current terminal of the transistor and to the second current terminal of the transistor; and   a current amplifier coupled to the current sense circuit.   
     
     
         13 . The circuit of  claim 12 , wherein the transistor is a first transistor, the circuit further comprising:
 a second transistor having a current terminal and a control terminal, the current terminal coupled to the second current terminal of the first transistor;   a pulse width modulation (PWM) circuit having a first input, a second input, and an output, the first input coupled to the current terminal of the second transistor and the output coupled to the control terminal of the first transistor;   a voltage-to-current (V2I) converter having an input and an output, the output coupled to the second input of the PWM circuit; and   a third transistor having a current terminal and a control terminal, the current terminal coupled to the input of the V2I converter and the control terminal coupled to the current amplifier.   
     
     
         14 . The circuit of  claim 12 , wherein the transistor is a first transistor, the circuit further comprising:
 a second transistor having a first current terminal, a second current terminal, and a control terminal, the first current terminal coupled to the current sense circuit, the second current terminal coupled to the current amplifier, and the control terminal coupled to the second current terminal of the first transistor; and   a current source coupled to the second current terminal of the second transistor.   
     
     
         15 . A circuit comprising:
 an inductor having a first terminal and a second terminal;   a transistor having a control terminal, a first current terminal, and a second current terminal, the first current terminal coupled to the second terminal of the inductor; and   a driver circuit having a first input, a second input, and an output, the output coupled to the control terminal of the transistor, the driver circuit comprising:
 a logic gate having a first input terminal, a second input terminal, and an output terminal, the first input terminal coupled to the first input of the driver circuit and the second input terminal coupled to the input of the driver circuit; and 
 a switch having a current terminal and a control terminal, the control terminal coupled to the output terminal of the logic gate and the current terminal coupled to the output of the driver circuit. 
   
     
     
         16 . The circuit of  claim 15 , wherein the transistor is a first transistor, the driver circuit further comprises a second transistor having a first current terminal, a second current terminal, and a control terminal, wherein the first current terminal is coupled to the first terminal of the first transistor, the second current terminal is coupled to the control terminal of the first transistor, and the current terminal coupled to the second input of the driver circuit. 
     
     
         17 . The circuit of  claim 15 , further comprising a comparator circuit having a first input, a second input, a first output, and a second output, the first input coupled to the first terminal of the inductor, the second input coupled to the second current terminal of the transistor, the first output coupled to the first input of the driver circuit, and the second output coupled to the second output of the driver circuit. 
     
     
         18 . The circuit of  claim 15 , wherein the transistor is a first transistor, the circuit further comprising:
 a second transistor having a first current terminal and a second current terminal, the first current terminal coupled to the second current terminal of the second transistor;   an operational amplifier having a first input, a second input, and an output, the first input coupled to the second current terminal of the second transistor and the second input coupled to the first current terminal of the first transistor;   a third transistor having a first current terminal, a second current terminal, and a control terminal, the second current terminal coupled to the second current terminal of the second transistor and the control terminal coupled to the output of the operational amplifier;   a current mirror having a first terminal and a second terminal, the first terminal coupled to the first current terminal of the third transistor;   a fourth transistor having a first current terminal, a second current terminal, and a control terminal, the first current terminal coupled to the second terminal of the current mirror and the control terminal coupled to the second current terminal of the first transistor; and   a current source coupled to the second current terminal of the fourth transistor.   
     
     
         19 . The circuit of  claim 18 , further comprising:
 a current amplifier coupled to the current source;   a fifth transistor having a control terminal coupled to the current amplifier;   a resistor coupled to the control terminal of the fifth transistor; and   a capacitor coupled to the resistor.   
     
     
         20 . The circuit of  claim 15 , wherein the switch is a first switch, and the current terminal of the first switch is a first current terminal, the driver circuit further comprising:
 an inverter having an input and an output, the input coupled to the output of the logic gate;   a second switch having a control terminal and a current terminal, the control terminal coupled to the output of the inverter, and the current terminal coupled to the current terminal of the first switch; and   a resistor coupled between a second current terminal of the first switch and the second current terminal of the transistor.