US2025107138A1PendingUtilityA1

Semiconductor device and method for manufacturing semiconductor device

Assignee: ROHM CO LTDPriority: Sep 27, 2023Filed: Sep 25, 2024Published: Mar 27, 2025
Est. expirySep 27, 2043(~17.2 yrs left)· nominal 20-yr term from priority
H10P 50/691H10D 30/0221H10D 62/109H10D 62/117H10D 62/307H10D 30/603H10D 62/393H10D 30/0281H10D 30/65H01L 21/308
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Claims

Abstract

A semiconductor device includes a semiconductor substrate having a first conductivity type; a gate electrode positioned on the semiconductor substrate; and a semiconductor part embedded in the semiconductor substrate and having the first conductivity type, in which the semiconductor substrate is provided with at least a part of a drift region being adjacent to the semiconductor part and having a second conductivity type, and a surface of the semiconductor part and a first portion included in a surface of the drift region are positioned higher than a second portion in a surface of the semiconductor substrate, the second portion being positioned below the gate electrode.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate having a first conductivity type;   a gate electrode positioned on the semiconductor substrate; and   a semiconductor part embedded in the semiconductor substrate and having the first conductivity type, wherein   the semiconductor substrate is provided with at least a part of a drift region being adjacent to the semiconductor part and having a second conductivity type, and   a surface of the semiconductor part and a first portion included in a surface of the drift region are positioned higher than a second portion in a surface of the semiconductor substrate, the second portion being positioned below the gate electrode.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the semiconductor substrate is provided with whole of the drift region, and a drain region positioned on the first portion and having the second conductivity type. 
     
     
         3 . The semiconductor device according to  claim 1 , further comprising a semiconductor layer positioned on the semiconductor substrate and having the second conductivity type, wherein
 the drift region is provided across the semiconductor substrate and the semiconductor layer, and   a surface of the semiconductor layer corresponds to the first portion.   
     
     
         4 . The semiconductor device according to  claim 3 , wherein the semiconductor part is embedded into an opening of the semiconductor layer. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein a difference between a depth of the drift region and a depth of the semiconductor part is 10% or less. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein an impurity concentration of the semiconductor part and an impurity concentration of the drift region are higher than an impurity concentration of the semiconductor substrate. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein a difference between an impurity concentration of the semiconductor part and an impurity concentration of the drift region is 10% or less. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the semiconductor part is grounded. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein a lateral width of the semiconductor part in plan view is 0.5 μm or more and 1 μm or less. 
     
     
         10 . A method for manufacturing a semiconductor device, the method comprising:
 forming an impurity region having a second conductivity type in a semiconductor substrate having a first conductivity type;   forming a trench in a region adjacent to the impurity region in the semiconductor substrate;   embedding a semiconductor part having the first conductivity type into the trench;   forming a mask covering at least a part of the impurity region and the semiconductor part;   thinning a portion of the semiconductor substrate exposed from the mask by etching; and   forming a gate electrode on the portion of the semiconductor substrate, wherein   the impurity region corresponds to a drift region of a transistor including the gate electrode.   
     
     
         11 . The method for manufacturing a semiconductor device according to  claim 10 , wherein a difference between a depth of the drift region and a depth of the semiconductor part is 10% or less. 
     
     
         12 . The method for manufacturing a semiconductor device according to  claim 10 , wherein an impurity concentration of the semiconductor part and an impurity concentration of the drift region are higher than an impurity concentration of the semiconductor substrate. 
     
     
         13 . The method for manufacturing a semiconductor device according to  claim 10 , wherein a difference between an impurity concentration of the semiconductor part and an impurity concentration of the drift region is 10% or less. 
     
     
         14 . The method for manufacturing a semiconductor device according to  claim 10 , wherein a lateral width of the semiconductor part in plan view is 0.5 μm or more and 1 μm or less. 
     
     
         15 . A method for manufacturing a semiconductor device, the method comprising:
 forming an impurity region having a second conductivity type in a semiconductor substrate having a first conductivity type;   forming a semiconductor layer having the second conductivity type on the semiconductor substrate;   forming a trench in a region adjacent to the impurity region in the semiconductor substrate and an opening at a portion in the semiconductor layer overlapping with the trench;   embedding a semiconductor part having the first conductivity type across the trench and the opening;   forming a mask covering at least a part of a portion of the semiconductor layer overlapping with the impurity region;   removing a portion of the semiconductor layer exposed from the mask; and   forming a gate electrode on the portion of the semiconductor substrate, wherein   the impurity region corresponds to a drift region of a transistor including the gate electrode.   
     
     
         16 . The method for manufacturing a semiconductor device according to  claim 15 , wherein a difference between a depth of the drift region and a depth of the semiconductor part is 10% or less. 
     
     
         17 . The method for manufacturing a semiconductor device according to  claim 15 , wherein an impurity concentration of the semiconductor part and an impurity concentration of the drift region are higher than an impurity concentration of the semiconductor substrate. 
     
     
         18 . The method for manufacturing a semiconductor device according to  claim 15 , wherein a difference between an impurity concentration of the semiconductor part and an impurity concentration of the drift region is 10% or less. 
     
     
         19 . The method for manufacturing a semiconductor device according to  claim 15 , wherein a lateral width of the semiconductor part in plan view is 0.5 μm or more and 1 μm or less.

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