Monolithic rgb microled array

Abstract

A light emitting diode (LED) pixel array and method of fabrication thereof. A semiconductor wafer template includes a successively stacked first n-GaN layer, first MQW layer, p-GaN layer, and dielectric layer. A plurality of apertures is formed through the dielectric layer, extending to the p-GaN layer. A plurality of mesas is formed by forming, within each aperture, a second MQW layer and a second n-GaN layer above each second MQW layer. The second n-GaN layer and second MQW layer of each mesa form a respective mesa LED with the p-GaN layer. The first n-GaN layer and first MQW layer form a lower LED with the p-GaN layer.

What is claimed is: 
     
         1 . A method of fabricating a light emitting diode (LED) pixel array from a semiconductor wafer template comprising a successively stacked first n-type gallium nitride (n-GaN) layer, first multiple quantum well (MQW) layer, p-type gallium nitride (p-GaN) layer, and dielectric layer, the method comprising:
 forming a plurality of apertures through the dielectric layer and extending to the p-GaN layer; and   forming a plurality of mesas by forming, within each aperture:
 a second MQW layer; and 
 a second n-GaN layer above each second MQW layer, 
   such that:
 the second n-GaN layer and second MQW layer of each mesa form a respective mesa LED with the p-GaN layer; and 
 the first n-GaN layer and first MQW layer form a lower LED with the p-GaN layer. 
   
     
     
         2 . The method of  claim 1 , further comprising:
 removing a portion of the dielectric layer to expose a portion of the p-GaN layer; and   forming a p-type electrical contact on the exposed portion of the p-GaN layer.   
     
     
         3 . The method of  claim 2 , wherein:
 the p-type electrical contact comprises a transparent conductive oxide.   
     
     
         4 . The method of  claim 1 , further comprising:
 etching through the dielectric layer, p-GaN layer, and first MQW layer to expose a portion of the first n-GaN layer; and   forming an n-type electrical contact on the exposed portion of the first n-GaN layer.   
     
     
         5 . The method of  claim 4 , wherein:
 the n-type electrical contact comprises aluminum.   
     
     
         6 . The method of  claim 1 , further comprising:
 forming an n-type electrical contact on the second n-GaN layer of each mesa.   
     
     
         7 . The method of  claim 1 , further comprising:
 removing a portion of the dielectric layer to expose a portion of the p-GaN layer;   forming a p-type electrical contact on the exposed portion of the p-GaN layer;   masking the p-type electrical contact;   etching through the dielectric layer, p-GaN layer, and first MQW layer to expose a portion of the first n-GaN layer;   forming an n-type electrical contact on the exposed portion of the first n-GaN layer; and   forming an n-type electrical contact on the second n-GaN layer of each mesa.   
     
     
         8 . The method of  claim 1 , wherein:
 each mesa has sidewalls formed at an angle defined by a semi-polar surface of a crystal structure of the second MQW layer and second n-GaN layer.   
     
     
         9 . The method of  claim 1 , wherein:
 the lower LED is a blue LED.   
     
     
         10 . The method of  claim 9 , wherein:
 each mesa LED is a tunable red/green LED.   
     
     
         11 . The method of  claim 9 , wherein:
 the mesa LEDs comprise at least one red LED and at least one green LED.   
     
     
         12 . The method of  claim 1 , wherein:
 the lower LED is a tunable blue/green LED; and   each mesa LED is a red LED.   
     
     
         13 . The method of  claim 1 , wherein:
 the semiconductor wafer template further comprises, under the first n-GaN layer, a successively stacked substrate layer and undoped gallium nitride (u-GaN) layer.   
     
     
         14 . The method of  claim 13 , further comprising forming the semiconductor wafer template by:
 epitaxially forming the u-GaN layer on the substrate layer;   epitaxially forming the first n-GaN layer on the u-GaN layer;   epitaxially forming the first MQW layer above the first n-GaN layer;   epitaxially forming the p-GaN layer above the first MQW layer; and   epitaxially forming the dielectric layer above the p-GaN layer.   
     
     
         15 . The method of  claim 1 , wherein:
 each mesa has six sidewalls, defining a substantially hexagonal shape of each mesa.   
     
     
         16 . A pixel array formed in accordance with the method of  claim 1 . 
     
     
         17 . A light emitting diode (LED) pixel array, comprising a plurality of LED pixel structures, each LED pixel structure comprising:
 a lower LED comprising a successively stacked first n-GaN layer, first MQW layer, and p-GaN layer; and   a plurality of mesas formed above the p-GaN layer, each mesa defining a respective mesa LED comprising a second MQW layer between the p-GaN layer and a second N-GaN layer.   
     
     
         18 . The pixel array of  claim 17 , wherein each LED pixel structure further comprises:
 a p-type electrical contact formed on a portion of the p-GaN layer;   an n-type electrical contact formed on an exposed portion of the first n-GaN layer; and   an n-type electrical contact formed on the second n-GaN layer of each mesa.   
     
     
         19 . The pixel array of  claim 17 , wherein:
 the lower LED is a tunable blue/green LED; and   each mesa LED is a red LED.   
     
     
         20 . The pixel array of  claim 17 , wherein:
 the lower LED is a blue LED; and   each mesa LED is a tunable red/green LED.