Translating Between CXL.mem and CXL.cache Read Transactions

Abstract

Embodiments for communicating over a first Compute Express Link (CXL) interface with a first host according to CXL.mem protocol and over a second CXL interface with a second host according to CXL.cache protocol. The CXL.mem and CXL.cache protocols are terminated, and a CXL.mem M2S Req received from the first host is translated to a CXL.cache D2H Req sent to the second host. A CXL.cache H2D Req Snp* received from the second host is responded to with a CXL.cache D2H Resp RspIHitI. Optionally, the first host also communicates according to CXL.cache, and responsive to receiving from the first host a second CXL.cache H2D Req Snp*, sending to the first host a second CXL.cache D2H RspIHitI.

1 - 20 . (canceled) 
     
     
         31 . A method, comprising:
 communicating with a first host, over a first Compute Express Link (CXL) interface, according to CXL.mem protocol;   communicating with a second host, over a second CXL interface, according to CXL.cache protocol;   terminating the CXL.mem and CXL.cache protocols;   receiving, from the first host, a CXL.mem Master-to-Subordinate Request (M2S Req);   translating the M2S Req to a CXL.cache Device-to-Host Request (D2H Req) to be sent to the second host;   receiving, from the second host, a CXL.cache Host-to-Device Request comprising a Snp* opcode (H2D Req Snp*); and   responding with a CXL.cache D2H Resp comprising a RsplHitI opcode (D2H Resp RsplHitI).   
     
     
         32 . The method of  claim 31 , wherein the Snp* opcode is selected from SnpData, SnpInv, or SnpCur; the H2D Req further comprises a Unique Queue ID (UQID); the D2H Resp RspIHitI further comprises the UQID; and the H2D Req Snp* is not translated to a corresponding CXL.mem message. 
     
     
         33 . The method of  claim 31 , wherein the M2S Req comprises: a MemRd* opcode, and a Tag (M2S Req MemRd*); the D2H Req comprises: a RdCurr opcode, and a first Command Queue ID (CQID) (D2H Req RdCurr); and further comprising: receiving, from the second host, a H2D Data message comprising: Data, and the first CQID; and sending, to the first host, a CXL.mem Subordinate-to-Master Data Response (S2M DRS) comprising: the Data, and the Tag. 
     
     
         34 . The method of  claim 33 , wherein each of the H2D Req Snp* and the D2H Resp RsplHitI further comprises a Unique Queue ID (UQID); the MemRd* opcode is selected from MemRd, MemRdData, MemRdTEE, or MemRdDataTEE; and further comprising sending an S2M NDR *Cmp* before, concurrently, or after sending the S2M DRS. 
     
     
         35 . The method of  claim 33 , wherein the M2S Req MemRd* further comprises a first address belonging to Host Physical Address (HPA) of the first host, and the D2H Req RdCurr further comprises a second address belonging to HPA of the second host. 
     
     
         36 . The method of  claim 31 , further comprising communicating with the first host over the first CXL interface according to CXL.cache; and responsive to receiving, from the first host, a second CXL.cache H2D Req comprising a Snp* opcode, sending, to the first host, a second CXL.cache D2H Resp comprising a RspIHitI opcode. 
     
     
         37 . A non-transitory computer-readable medium comprising instructions that, when executed by a processor, cause the processor to perform the method of  claim 31 . 
     
     
         38 . An apparatus, comprising:
 a first Compute Express Link (CXL) interface configured to communicate with a first host according to CXL.mem protocol;   a second CXL interface configured to communicate with a second host according to CXL.cache;   a computer configured to: terminate the CXL.mem and CXL.cache protocols, and translate a received CXL.mem Master-to-Subordinate Request (M2S Req) to a CXL.cache Device-to-Host Request (D2H Req); and   wherein the apparatus is further configured to: receive, from the second host, a CXL.cache Host-to-Device Request comprising a Snp* opcode (H2D Req Snp*), and respond with a CXL.cache D2H Resp comprising a RspIHitI opcode (D2H Resp RspIHitI).   
     
     
         39 . The apparatus of  claim 38 , wherein the Snp* opcode is selected from SnpData, SnpInv, or SnpCur; and wherein the H2D Req further comprises a Unique Queue ID (UQID), and the D2H Resp RspIHitI further comprises the UQID. 
     
     
         40 . The apparatus of  claim 38 , wherein the M2S Req comprises a MemRd* opcode and a Tag (M2S Req MemRd*), and the D2H Req comprises a RdCurr opcode and a first Command Queue ID (CQID) (D2H Req RdCurr); and wherein the apparatus is further configured to: receive, from the second host, a H2D Data message comprising Data and the first CQID, and send, to the first host, a corresponding CXL.mem Subordinate-to-Master Data Response (S2M DRS) comprising the Tag and the Data. 
     
     
         41 . The apparatus of  claim 40 , wherein the MemRd* opcode is selected from MemRd, MemRdData, MemRdTEE, or MemRdDataTEE. 
     
     
         42 . The apparatus of  claim 40 , wherein the computer is further configured to generate a Subordinate-to-Master No Data Response *Cmp*, and the first CXL interface is further configured to send the S2M NDR *Cmp* to the first host before, concurrently, or after sending the S2M DRS; and wherein the D2H Resp RspIHitI further comprise a Unique Queue ID (UQID). 
     
     
         43 . The apparatus of  claim 40 , wherein the M2S Req MemRd* further comprises a first address belonging to Host Physical Address (HPA) of the first host, the D2H Req RdCurr further comprises a second address belonging to HPA of the second host, and the apparatus enables the first host to communicate with the second host according to CXL.mem and/or CXL.cache. 
     
     
         44 . The apparatus of  claim 38 , wherein the second interface exposes at least one address region mapped as Host-only Coherent Host-managed Device Memory (HDM-H). 
     
     
         45 . The apparatus of  claim 38 , wherein the second interface exposes at least one address region mapped as: other than a device coherent host-managed device memory (HDM-D), or other than a device coherent using back-invalidate host-managed device memory (HDM-DB). 
     
     
         46 . The apparatus of  claim 38 , wherein the first CXL interface is further configured to communicate with the first host according to CXL.cache protocol, and the first interface exposes at least one address region mapped as Host-only Coherent Host-managed Device Memory (HDM-H). 
     
     
         47 . The apparatus of  claim 38 , wherein the first CXL interface is either a Type 2 or Type 3 CXL device, and the second CXL interface is either a Type 1 or Type 2 CXL device. 
     
     
         48 . The apparatus of  claim 38 , wherein the first CXL interface is a Type 3 CXL device, and the second CXL interface is a Type 1 CXL device. 
     
     
         49 . A switch, comprising:
 a first switch port configured to communicate with a first host according to CXL.mem protocol, wherein CXL denotes Compute Express Link;   a second switch port configured to communicate with a second host according to CXL.cache;   a computer configured to: terminate the CXL.mem and CXL.cache protocols, and translate a received CXL.mem Master-to-Subordinate Request (M2S Req) to a CXL.cache Device-to-Host Request (D2H Req); and   wherein the switch is further configured to: receive, from the second host, a CXL.cache Host-to-Device Request comprising a Snp* opcode (H2D Req Snp*), and respond with a CXL.cache D2H Resp comprising a RspIHitI opcode (D2H Resp RspIHitI).   
     
     
         50 . The switch of  claim 49 , wherein the Snp* opcode is selected from SnpData, SnpInv, or SnpCur; wherein the M2S Req comprises a MemRd* opcode and a Tag (M2S Req MemRd*), and the D2H Req comprises a RdCurr opcode and a first Command Queue ID (CQID) (D2H Req RdCurr); and wherein the switch is further configured to: receive, from the second host, a H2D Data message comprising Data and the first CQID, and send, to the first host, a corresponding CXL.mem Subordinate-to-Master Data Response (S2M DRS) comprising the Tag and the Data. 
     
     
         51 . The switch of  claim 50 , wherein the computer is further configured to generate a Subordinate-to-Master No Data Response *Cmp*, and the first switch port is further configured to send the S2M NDR *Cmp* to the first host before, concurrently, or after sending the S2M DRS; and wherein the D2H Resp RspIHitI further comprise a Unique Queue ID (UQID). 
     
     
         52 . The switch of  claim 49 , wherein each of the first and second switch ports belong to one of: a Hierarchy Based Routing (HBR) switch port, a Port Based Routing (PBR) switch port, a Virtual CXL Switch (VCS) that comprise a single Upstream Switch Port (USP) and one or more Downstream Switch Ports (DSPs), a Switch Interface Port, or a Switch Physical Port. 
     
     
         53 . The switch of  claim 49 , wherein the first switch port couples the first host to a first Virtual CXL Switch (VCS), the second switch port couples the second host to a second VCS, and the first and second VCSs are coupled via the computer. 
     
     
         54 . The switch of  claim 49 , wherein (i) the first switch port is an Upstream Switch Port (USP) and the second switch port is an USP, or (ii) the first switch port is an USP and the second switch port is a Downstream Switch Port (DSP).