Semiconductor device and method for manufacturing semiconductor device

Abstract

A semiconductor device includes a semiconductor chip including first and second main surfaces. A first semiconductor region of a first conductivity type is formed in the semiconductor chip near the first main surface. A second semiconductor region of a second conductivity type is formed closer to the second main surface than the first semiconductor region is. A trench structure includes a trench extending from the first main surface and partitioning the first semiconductor region into first and second regions. A control insulation film covers a wall of the trench. A control electrode is embedded in the trench with the control insulation film interposed to electrically connect the first and second regions. A third semiconductor region of the first conductivity type is formed closer to the second main surface than the second semiconductor region. The third semiconductor region and the trench structure sandwich the second semiconductor region.

1 . A semiconductor device, comprising:
 a semiconductor chip including a first main surface and a second main surface at an opposite side of the first main surface;   a first semiconductor region of a first conductivity type that is formed in the semiconductor chip near the first main surface;   a second semiconductor region of a second conductivity type that is formed closer to the second main surface than the first semiconductor region is;   a trench structure including a trench extending from the first main surface through the first semiconductor region and partitioning the first semiconductor region in cross section into a first region at one side and a second region at another side, a control insulation film covering a wall of the trench, and a control electrode embedded in the trench with the control insulation film interposed and controlling a channel that electrically connects the first region and the second region in a transverse direction extending parallel to the first main surface in the second semiconductor region; and   a third semiconductor region of the first conductivity type that is formed closer to the second main surface than the second semiconductor region, wherein the third semiconductor region and the trench structure sandwich the second semiconductor region.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the second semiconductor region immediately below a distal end of the trench has a thickness in a range from 0.01 μm to 10 μm, inclusive. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein:
 the first semiconductor region includes
 a first contact region electrically connected to a first electrode in the first region, and 
 a second contact region electrically connected to a second electrode in the second region; and 
   the second semiconductor region immediately below at least one of the first contact region and the second contact region has a thickness in a range from 0.01 μm to 10 μm, inclusive.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein:
 the first semiconductor region includes
 a first contact region electrically connected to a first electrode in the first region, and 
 a second contact region electrically connected to a second electrode in the second region; and 
   the second semiconductor region immediately below at least one of the first contact region and the second contact region is thinner than the second semiconductor region immediately below a distal end of the trench.   
     
     
         5 . The semiconductor device according to  claim 1 , wherein the third semiconductor region immediately below a distal end of the trench has a thickness of 0.001 μm or greater. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the third semiconductor region has a lower first conductivity type impurity concentration than the first semiconductor region. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein the second semiconductor region electrically insulates the first semiconductor region and the third semiconductor region. 
     
     
         8 . The semiconductor device according to  claim 1 , further comprising:
 a drift region sandwiched between the trench structure and a further trench structure, wherein
 the first region includes a first source-drain region opposing the drift region with one of the trench structures interposed, and 
 the second region includes a second source-drain region opposing the drift region with one of the trench structures interposed; 
   a first source-drain electrode electrically connected to the first source-drain region; and   a second source-drain electrode electrically connected to the second source-drain region.   
     
     
         9 . The semiconductor device according to  claim 8 , wherein:
 the drift region, the first source-drain region, and the second source-drain region are arranged sandwiching the trench structures in a first direction; and   the drift region is shorter in length in the first direction than the first source-drain region and shorter in length in the first direction than the second source-drain region.   
     
     
         10 . A method for manufacturing a semiconductor device, the method comprising:
 in a semiconductor chip including a first main surface, a second main surface at an opposite side of the first main surface, and a first conductivity type region near the first main surface, forming a trench in the first conductivity type region from the first main surface;   implanting impurities of a second conductivity type into the first conductivity type region through the trench to form a second semiconductor region of the second conductivity type that separates the first conductivity type region into a first semiconductor region of a first conductivity type located near the first main surface and a third semiconductor region of the first conductivity type located near the second main surface;   forming a control insulation film covering a wall of the trench; and   forming a control electrode embedded in the trench with the control insulation film interposed.