Apparatus and method for performing process simulation of semiconductor devices
Abstract
Provided are an apparatus and method for generating a wafer map corresponding to coordinates of a wafer by using a distribution model. A method of performing a process simulation of a semiconductor device includes computing reaction of input data by using a plasma model, and based on the computed reaction, generating a first output including first flux and first energy, generating a second output including second flux and second energy, based on the first output and coordinates of a wafer, by using a distribution model, and generating a wafer map based on the second output and a structure of the wafer by using an etch model, wherein the second flux includes flux corresponding to each of the coordinates of the wafer, and wherein the second energy includes energy corresponding to each of the coordinates of the wafer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of performing a process simulation of a semiconductor device, the method comprising:
computing a reaction of input data by using a plasma model, and based on the computed reaction, generating a first output including first flux and first energy; generating a second output including second flux and second energy, the generating the second output based on the first output and coordinates of a wafer, the generating the second output by using a distribution model; and generating a wafer map based on the second output and a structure of the wafer, the generating the wafer map by using an etch model, wherein the second flux comprises flux corresponding to each of the coordinates of the wafer, and the second energy comprises energy corresponding to each of the coordinates of the wafer.
2 . The method of claim 1 , wherein the wafer map comprises a distribution of the second flux, a distribution of the second energy, and critical dimensions (CDs) corresponding to each of the coordinates of the wafer.
3 . The method of claim 1 , wherein the coordinates of the wafer comprise any one of coordinates corresponding to a cartesian coordinate system or coordinates corresponding to a polar coordinate system.
4 . The method of claim 1 , further comprising:
generating the distribution model, wherein the generating of the distribution model comprises, computing third flux and third energy for outputting a first output CD by using the etch model, computing the second output for outputting a second output CD by using an algorithm, based on the third flux, the third energy, and the coordinates of the wafer, and generating the distribution model which is a function configured to output the second output with the third flux, the third energy, and the coordinates of the wafer as an input, wherein the first output CD comprises at least one of an average CD of the wafer and the CD corresponding to a center of the wafer, and the second output CD comprises the CD corresponding to the coordinates of the wafer.
5 . The method of claim 4 , wherein the algorithm comprises an algorithm to compute the second output to reduce an objective function by receiving the third flux, the third energy, and the coordinates of the wafer as input, and changing the third flux and the third energy.
6 . The method of claim 4 , wherein the function comprises a function generated by using at least one of an artificial neural network or symbolic regression (SR).
7 . The method of claim 1 , further comprising:
training the distribution model, wherein the training of the distribution model comprises, receiving measured CDs corresponding to the coordinates of the wafer, and training the distribution model based on a training set by using the plasma model and the etch model, and wherein the training set comprises the input data, the coordinates of the wafer, and CDs corresponding to the coordinates of the wafer.
8 . The method of claim 1 , wherein the wafer map is configured to be quantified in response to any one of a distance from a center of the wafer, an angle from the center of the wafer, and a structure of the wafer.
9 . The method of claim 8 , further comprising:
calibrating the wafer map by changing the input data based on the quantified wafer map.
10 . A system comprising:
at least one processor; and a non-transitory storage medium storing machine-readable instructions which, when executed by the at least one processor, cause the system to execute a method of performing a process simulation of a semiconductor device, wherein the method of performing the process simulation of the semiconductor device comprises, outputting first flux and first energy, the outputting first flux and first energy based on a reaction of input data including gas, temperature, and a voltage; outputting second flux and second energy, the second flux and second energy corresponding to coordinates of a wafer, the outputting the second flux and second energy based on the first flux, the first energy, and the coordinates of the wafer, the outputting the second flux and second energy by using a distribution model; and generating a wafer map based on the second flux, the second energy, and a structure of the wafer, the generating the wafer map by using an etch model, and wherein the wafer map comprises critical dimensions (CDs) corresponding to a distribution of the second flux, a distribution of the second energy, and the coordinates of the wafer.
11 . The system of claim 10 ,
wherein the method of performing the process simulation of the semiconductor device comprises: computing third flux and third energy for outputting a first output CD by using the etch model; computing the second output and the second energy for outputting a second output CD by using an optimization algorithm, based on the third flux, the third energy, and the coordinates of the wafer; and generating the distribution model which is a function configured to output the second flux and the second energy with the third flux, the third energy, and the coordinates of the wafer as an input, wherein the first output CD comprises any one of an average CD of the wafer and the CD corresponding to a center of the wafer, and wherein the second output CD comprises the CD corresponding to the coordinates of the wafer.
12 . The system of claim 11 , wherein
the optimization algorithm comprises an algorithm for computing the second flux and the second energy to reduce an objective function by receiving the third flux, the third energy, and the coordinates of the wafer as an input, and changing the third flux and the third energy.
13 . The system of claim 10 , wherein
a method of performing the process simulation of the semiconductor device comprises: receiving measured CDs corresponding to the coordinates of the wafer; and training the distribution model based on a training set including the input data, the coordinates of the wafer, and CDs corresponding to the coordinates of the wafer.
14 . The system of claim 10 , wherein
the wafer map is configured to be quantified in response to any one of a distance from a center of the wafer, an angle from the center of the wafer, and a structure of the wafer.
15 . The system of claim 10 , wherein
the coordinates of the wafer comprise any one of coordinates corresponding to a cartesian coordinate system and coordinates corresponding to a polar coordinate system.
16 . A storage medium comprising:
a non-transitory computer-readable recording medium including machine-readable instructions, wherein the instructions are configured such that, when executed by at least one processor, the at least one processor executes a method of performing a process simulation of a semiconductor device, wherein the method of performing the process simulation of the semiconductor device comprises: outputting first flux and first energy based on a reaction of input data including gas, temperature, and a voltage; outputting second flux and second energy corresponding to coordinates of a wafer, based on the first flux, the first energy, and the coordinates of the wafer, by using a distribution model; and generating a wafer map based on the second flux, the second energy, and a structure of the wafer by using an etch model, and wherein the wafer map comprises critical dimensions (CDs) corresponding to a distribution of the second flux, a distribution of the second energy, and the coordinates of the wafer.
17 . The storage medium of claim 16 , wherein the method of performing the process simulation of the semiconductor device further comprises:
computing third flux and third energy for outputting a first output CD by using the etch model; computing the second output and the second energy for outputting a second output CD by using an algorithm, based on the third flux, the third energy, and the coordinates of the wafer; and generating the distribution model which includes a function configured to output the second flux and the second energy with the third flux, the third energy, and the coordinates of the wafer as an input, wherein the first output CD comprises any one of an average CD of the wafer and the CD corresponding to a center of the wafer, and the second output CD comprises the CD corresponding to the coordinates of the wafer.
18 . The storage medium of claim 16 , wherein the method of performing the process simulation of the semiconductor device further comprises:
receiving measured CDs corresponding to the coordinates of the wafer; and training the distribution model based on a training set including the input data, the coordinates of the wafer, and CDs corresponding to the coordinates of the wafer.
19 . The storage medium of claim 16 , wherein
the wafer map is configured to be quantified in response to any one of a distance from a center of the wafer, an angle from the center of the wafer, and a structure of the wafer.
20 . The storage medium of claim 16 , wherein
the coordinates of the wafer comprise any one of coordinates corresponding to a cartesian coordinate system and coordinates corresponding to a polar coordinate system.Join the waitlist — get patent alerts
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