Multilayer ceramic capacitor
Abstract
A multilayer ceramic capacitor includes an inner-layer portion, first and second outer-layer portions, and first and second side margin portions. Dielectric particles of each of ceramic dielectrics of the inner-layer portion, and the first and second side margin portions include a void. An intragranular void density in a middle portion of the inner-layer portion (inner-layer middle portion) (N [inner-layer middle portion]) and intragranular void densities in the first and second side margin portions (N [side margin portion]) satisfy N [inner-layer middle portion]<N [side margin portion]. A D50 diameter of dielectric particles in an end portion of the inner-layer portion (inner-layer W-end portion) (D5 [(inner-layer W-end portion) and a D50 diameter of dielectric particles in a middle portion of the inner-layer portion (inner-layer middle portion) (D50 [inner-layer middle portion]) satisfy about 1.00≤D50 [inner-layer W-end portion]/D50 [inner-layer middle portion]≤about 1.40.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A multilayer ceramic capacitor comprising:
an inner-layer portion including at least one first inner electrode layer and at least one second inner electrode layer alternately stacked with at least one dielectric layer including a ceramic dielectric interposed therebetween, a first primary surface facing a stacking direction, a second primary surface opposite to the first primary surface, a first side surface facing a width direction orthogonal or substantially orthogonal to the first primary surface and the second primary surface and to which the first inner electrode layer and the second inner electrode layer are extended, a second side surface opposite to the first side surface and to which the first inner electrode layer and the second inner electrode layer are extended, a first end surface facing a length direction orthogonal or substantially orthogonal to the first primary surface, the second primary surface, the first side surface, and the second side surface, and to which the first inner electrode layer is extended, and a second end surface opposite to the first end surface and to which the second inner electrode layer is extended; a first outer-layer portion including a ceramic dielectric and covering the first primary surface in the stacking direction; a second outer-layer portion including a ceramic dielectric and covering the second primary surface in the stacking direction; a first side margin portion including a ceramic dielectric and covering the inner-layer portion, the first outer-layer portion, and the second outer-layer portion from one side in the width direction; a second side margin portion including a ceramic dielectric and covering the inner-layer portion, the first outer-layer portion, and the second outer-layer portion from another side in the width direction; and a pair of outer electrodes on the first end surface and the second end surface and coupled to each of the first inner electrode layer and the second inner electrode layer; wherein dielectric particles of each of the ceramic dielectrics of the inner-layer portion, the first side margin portion, and the second side margin portion include dielectric particles including a void therein; an intragranular void density in a middle portion of the inner-layer portion, or an inner-layer middle portion, defined as N [inner-layer middle portion], and intragranular void densities in the first side margin portion and the second side margin portion, defined as N [side margin portion], satisfy a relationship of N [inner-layer middle portion]<N [side margin portion]; and a D50 diameter of dielectric particles in an end portion in the width direction of the inner-layer portion, or an inner-layer W-end portion, defined as D50 [inner-layer W-end portion], and a D50 diameter of dielectric particles in a middle portion of the inner-layer portion, or the inner-layer middle portion, defined as D50 [inner-layer middle portion], satisfy a relationship of about 1.00≤D50 [inner-layer W-end portion]/D50 [inner-layer middle portion]≤about 1.40.
2 . The multilayer ceramic capacitor according to claim 1 , wherein the intragranular void density in the inner-layer middle portion, defined as N [inner-layer middle portion], is about 10 voids/μm 2 or less.
3 . The multilayer ceramic capacitor according to claim 1 , wherein
the ceramic dielectrics of the first outer-layer portion and the second outer-layer portion include dielectric particles including a void therein; and the intragranular void density in the middle portion of the inner-layer portion, or the inner-layer middle portion, defined as N [inner-layer middle portion], and intragranular void densities in the first outer-layer portion and the second outer-layer portion, defined as N [outer-layer portion], satisfy a relationship of N [inner-layer middle portion]<N [outer-layer portion].
4 . The multilayer ceramic capacitor according to claim 1 , wherein
a dimension of the multilayer ceramic capacitor in the length direction is about 0.2 mm or more and about 3.2 mm or less; a dimension of the multilayer ceramic capacitor in the width direction is about 0.1 mm or more and about 2.5 mm or less; and a dimension of the multilayer ceramic capacitor in the stacking direction is about 0.1 mm or more and about 2.5 mm or less.
5 . The multilayer ceramic capacitor according to claim 1 , wherein each of the dielectric particles includes a perovskite oxide as a main component.
6 . The multilayer ceramic capacitor according to claim 5 , wherein the perovskite oxide includes at least one of a barium titanate compound, a calcium titanate compound, or a strontium titanate compound.
7 . The multilayer ceramic capacitor according to claim 5 , wherein each of the dielectric particles includes at least one of a rare earth element, magnesium, manganese, iron, chromium, cobalt, nickel, silicon, aluminum, or vanadium as a secondary component.
8 . The multilayer ceramic capacitor according to claim 1 , wherein the plurality of dielectric particles include core-shell particles.
9 . The multilayer ceramic capacitor according to claim 1 , wherein a thickness of the at least one dielectric layer is about 0.6 μm or more and about 3.0 μm or less.
10 . The multilayer ceramic capacitor according to claim 1 , wherein a number of the at least one dielectric layer is 10 or more and 2000 or less.
11 . The multilayer ceramic capacitor according to claim 1 , wherein each of the at least one first inner electrode layer and the at least one second inner electrode layer includes nickel, copper, silver, palladium, a silver-palladium alloy, or gold.
12 . The multilayer ceramic capacitor according to claim 1 , wherein a thickness of each of the at least one first inner electrode layer and the at least one second inner electrode layer is about 0.40 μm or more and about 1.5 μm or less.
13 . The multilayer ceramic capacitor according to claim 1 , wherein each of the first and second outer-layer portions and the first and second side margin portions includes no inner electrode layer.
14 . The multilayer ceramic capacitor according to claim 1 , wherein each of the pair of outer electrodes includes a base electrode layer and a plating layer on the base electrode layer.
15 . The multilayer ceramic capacitor according to claim 1 , wherein a relationship of about 1.00≤D50 [inner-layer W-end portion]/D50 [inner-layer middle portion]≤about 1.17 is satisfied.
16 . The multilayer ceramic capacitor according to claim 1 , wherein a relationship of about 1.00≤D50 [inner-layer W-end portion]/D50 [inner-layer middle portion]≤about 1.06 is satisfied.
17 . The multilayer ceramic capacitor according to claim 1 , wherein D50 [inner-layer middle portion] is about 150 nm or more and about 360 nm or less.
18 . The multilayer ceramic capacitor according to claim 1 , wherein D50 [inner-layer W-end portion] is about 150 nm or more and about 500 nm or less.
19 . The multilayer ceramic capacitor according to claim 1 , wherein N [inner-layer middle portion] is more than 0 voids/μm 2 and about 10 voids/μm 2 or less.
20 . The multilayer ceramic capacitor according to claim 1 , wherein N [side margin portion] is about 5 voids/μm 2 or more and about 26 voids/μm 2 or less.Join the waitlist — get patent alerts
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