Capacitor die embedded in package substrate for providing capacitance to surface mounted die

Abstract

A package substrate is disclosed. The package substrate includes a die package in the package substrate located at least partially underneath a location of a power delivery interface in a die that is coupled to the surface of the package substrate. Connection terminals are accessible on a surface of the die package to provide connection to the die that is coupled to the surface of the package substrate. Metal-insulator-metal layers inside the die package are coupled to the connection terminals.

What is claimed is: 
     
         1 . A package comprising:
 a first die having a first footprint;   a second die laterally spaced apart from the first die, the second die having a second footprint;   a third die below the first die and the second die, wherein the third die is partially within the first footprint of the first die and partially within the second footprint of the second die; and   a capacitor die below the first die, the capacitor die within the second footprint of the second die, the capacitor die comprising a plurality of metal-insulator-metal (MIM) capacitors and a plurality of die pads coupled to the MIM capacitors, the die pads arranged in a plurality of rows.   
     
     
         2 . The package of  claim 1 , wherein die pads in a first row of the plurality of rows are associated with a ground voltage. 
     
     
         3 . The package of  claim 2 , wherein the first row is arranged between a second row and a third row, and die pads in the second row and the third row are associated with a source voltage. 
     
     
         4 . The package of  claim 2 , wherein die pads in a second row of the plurality of rows are associated with the ground voltage, and the first row is separated from the second row by at least one other row of die pads. 
     
     
         5 . The package of  claim 1 , wherein the capacitor die is a first capacitor die, and the package further comprises a second capacitor die below the second die. 
     
     
         6 . The package of  claim 5 , wherein the second capacitor die is within the second footprint of the second die. 
     
     
         7 . The package of  claim 1 , wherein the third die is coupled to the first die and the third die is coupled to the second die. 
     
     
         8 . The package of  claim 1 , wherein the capacitor die is a single-sided die. 
     
     
         9 . The package of  claim 1 , wherein the capacitor die is embedded in a substrate, and the first die and the second die are over the substrate. 
     
     
         10 . The package of  claim 1 , wherein plurality of MIM capacitors comprises a decoupling capacitor. 
     
     
         11 . A package comprising:
 a first die having a first footprint;   a second die laterally spaced apart from the first die, the second die having a second footprint, the first die and the second die in a first level;   a third die below the first die and the second die, wherein the third die is partially within the first footprint of the first die and partially within the second footprint of the second die;   a first capacitor die in a second level, the second level below the first level, the first capacitor die comprising a first plurality of metal-insulator-metal (MIM) capacitors and a first plurality of die pads coupled to the first plurality of MIM capacitors, the first plurality of die pads arranged in a first plurality of rows; and   a second capacitor die in the second level and laterally spaced apart from the first capacitor die, the second capacitor die comprising a second plurality of MIM capacitors and a second plurality of die pads coupled to the second plurality of MIM capacitors, the second plurality of die pads arranged in a second plurality of rows.   
     
     
         12 . The package of  claim 11 , wherein the first capacitor die and the second capacitor die are in the second footprint of the second die. 
     
     
         13 . The package of  claim 11 , wherein the third die is in the second level. 
     
     
         14 . The package of  claim 11 , wherein the first capacitor die and the second capacitor die are embedded in a substrate. 
     
     
         15 . The package of  claim 11 , wherein the first die and the second die are surface mounted dies. 
     
     
         16 . The package of  claim 11 , wherein the third die is coupled to the first die and the third die is coupled to the second die. 
     
     
         17 . The package of  claim 11 , wherein the first capacitor die and the second capacitor die are coupled to the second die. 
     
     
         18 . A package comprising:
 a first die having a first footprint;   a second die laterally spaced apart from the first die, the second die having a second footprint;   a third die below the first die and the second die, wherein the third die is partially within the first footprint of the first die and partially within the second footprint of the second die; and   a capacitor die below the first die and the second die, the capacitor die within the second footprint of the second die, wherein the capacitor die comprises a plurality of metal-insulator-metal (MIM) capacitors and a plurality of die pads at a surface of the capacitor die, the plurality of die pads are coupled to the plurality of MIM capacitors, and the plurality of die pads are arranged in a plurality of rows.   
     
     
         19 . The package of  claim 18 , wherein the capacitor die is a single-sided capacitor die. 
     
     
         20 . The package of  claim 18 , wherein the capacitor die is a first capacitor die, the package further comprises a second capacitor die below the second die, and the second capacitor die is within the second footprint of the second die.