Software and hardware hybrid simulation method and apparatus, device, storage medium, and program product

Abstract

The present disclosure relates to a software and hardware hybrid simulation method and apparatus, a computer device, a computer-readable storage medium, and a computer program product. The method includes: acquiring an updated command group from a command buffer, the command group including: parameter configuration; disassembling a task according to the parameter configuration in the updated command group to obtain disassembled tasks; and dispatching, according to different request features, the disassembled tasks to a previous-generation physical chip and a C model for processing, wherein the request features include features that are not changed compared to the previous-generation physical chip and features that are new compared to the previous-generation physical chip. Therefore, a pre-silicon software stack development cycle can be significantly shortened, so that software development activities can be started earlier. By advancing with an architecture C model, software development can cover more application test development scenarios with higher performance requirements and can also be deployed to a local environment, making debugging easier.

1 . A software and hardware hybrid simulation method, comprising:
 acquiring an updated command group from a command buffer, the command group comprising: parameter configuration;   disassembling a task according to the parameter configuration in the updated command group to obtain disassembled tasks;   dispatching, according to different request features, the disassembled tasks to a previous-generation physical chip and a C model for processing, wherein the request features comprise features that are not changed compared to the previous-generation physical chip and features that are new compared to the previous-generation physical chip.   
     
     
         2 . The method according to  claim 1 , further comprising: prior to acquiring the updated command group from the command buffer,
 recording relevant information of the command buffer in a register of a graphics processing unit (GPU), the relevant information comprising: any one or more of a command buffer address, a command buffer size, a current first address pointer, and a current tail address pointer; and   each time a driver requests a hardware operation, writing a command group to the command buffer, and updating a tail pointer register, to trigger a hardware fetch instruction action.   
     
     
         3 . The method according to  claim 2 , wherein acquiring the updated command group from the command buffer comprises:
 monitoring update of the tail pointer register in the command buffer in real time;   when there is an update to the tail pointer register in the command buffer, intercepting and scanning the command buffer to acquire the updated command group from the command buffer.   
     
     
         4 . The method according to  claim 1 , wherein the command group further comprises: any one or more of running instructions and synchronization instructions; and
 when the command group is the running instructions or the synchronization instructions, the method further comprises:   dispatching the running instructions or the synchronization instructions to the C model for processing.   
     
     
         5 . The method according to  claim 1 , wherein disassembling the task according to the parameter configuration in the updated command group to obtain the disassembled tasks, comprises:
 disassembling the task into an input task, a processing task, and an output task according to parameters in the updated command group.   
     
     
         6 . The method according to  claim 5 , wherein dispatching, according to the different request features, the disassembled tasks to the previous-generation physical chip and the C model for processing, comprises:
 dispatching the input task, the processing task, and the output task respectively to the previous-generation physical chip and/or the C model for processing.   
     
     
         7 . The method according to  claim 1 , further comprising:
 modifying the command group in the command buffer after task dispatch is completed.   
     
     
         8 . A software and hardware hybrid simulation apparatus, comprising:
 a command group acquisition module configured to acquire an updated command group from a command buffer, the command group comprising: parameter configuration;   a task disassembly module configured to disassemble a task according to the parameter configuration in the updated command group to obtain disassembled tasks;   a task dispatch module configured to dispatch, according to different request features, the disassembled tasks to a previous-generation physical chip and a C model for processing, wherein the request features comprise features that are not changed compared to the previous-generation physical chip and features that are new compared to the previous-generation physical chip.   
     
     
         9 . A computer device, comprising a memory and a processor, the memory storing a computer program, wherein the processor, when executing the computer program, implements steps of the method according to  claim 1 . 
     
     
         10 . A non-transitory computer-readable storage medium, having a computer program stored therein, wherein when the computer program is executed by a processor, steps of the method according to  claim 1  are implemented. 
     
     
         11 . A computer program product, comprising a computer program, wherein when the computer program is executed by a processor, steps of the method according to  claim 1  are implemented.