US2026040994A1PendingUtilityA1
Electronic device with improved reliability
Est. expiryJul 30, 2044(~18 yrs left)· nominal 20-yr term from priority
H10D 62/8325H10D 8/60H01L 23/29H01L 21/31144H01L 21/31122H01L 21/0495H01L 21/02115H01L 23/3192H10P 50/285H10D 64/0123H10P 14/6902H10P 50/73H10W 74/40H10W 42/121H10W 40/778H10W 40/25H10W 74/137H10W 74/147H10W 74/127H10W 74/43H10D 8/051H10D 62/106
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Claims
Abstract
An electronic device is provided. An example electronic device includes: a semiconductor body of Silicon Carbide, having a surface having a first portion of the surface that defines an active region of the electronic device and a second portion of the surface that is external to the active region; a metallization extending on the first portion of the surface of the semiconductor body; a passivation layer extending on part of the metallization; and an adhesion layer, based on one or more carbon allotropes, extending on the passivation layer.
Claims
exact text as granted — not AI-modified1 . An electronic device comprising:
a semiconductor body of Silicon Carbide, having a surface having a first portion of the surface that defines an active region of the electronic device and a second portion of the surface that is external to the active region; a metallization extending on the first portion of the surface of the semiconductor body; a passivation layer extending on part of the metallization; and an adhesion layer, based on one or more carbon allotropes, extending on the passivation layer.
2 . The electronic device of claim 1 , further comprising a protection layer extending above the adhesion layer and the metallization, where exposed by the passivation layer, such that the adhesion layer is interposed between the passivation layer and the protection layer orthogonally to the surface of the semiconductor body.
3 . The electronic device of claim 1 , wherein the adhesion layer further extends on the second portion of the surface, that is external to the active region and is exposed by the metallization and the passivation layer.
4 . The electronic device of claim 3 , wherein the adhesion layer is in contact with the second portion of the surface.
5 . The electronic device of claim 1 , wherein the adhesion layer extends at a distance from the metallization.
6 . The electronic device of claim 1 , wherein the adhesion layer is of one of graphene, graphite, diamond, or carbon nanotubes.
7 . The electronic device of claim 6 , wherein the adhesion layer is formed by a single graphene layer or by a graphene multilayer formed with a plurality of single graphene layers superimposed on each other.
8 . The electronic device of claim 7 , wherein the single graphene layer or the plurality of single graphene layers are arranged at least partially so as to be parallel to the surface of the semiconductor body.
9 . The electronic device of claim 1 , wherein the adhesion layer completely surrounds, parallel to the surface of the semiconductor body, the passivation layer and furthermore, orthogonally to the surface of the semiconductor body, covers the passivation layer.
10 . The electronic device of claim 1 , chosen from among a group comprising: a Schottky diode, a PiN diode, a PN diode, an MPS device, a JBS diode, a MOSFET, an IGBT, and a power device.
11 . A process for manufacturing an electronic device comprising:
forming a semiconductor body of Silicon Carbide, having a surface having a first portion of the surface for defining an active region of the electronic device and a second portion of the surface that is external to the active region; forming a metallization on the first portion of the surface of the semiconductor body; forming a passivation layer on part of the metallization; and forming an adhesion layer, based on one or more carbon allotropes, on the passivation layer.
12 . The process for manufacturing the electronic device of claim 11 , wherein forming the adhesion layer comprises:
forming an adhesion work layer, based on one or more carbon allotropes, above the passivation layer, the part of the metallization that is exposed by the passivation layer, and the second portion of the surface that is external to the active region; forming a lithographic mask on the adhesion work layer, the lithographic mask being superimposed on the passivation layer and on the second portion of the surface and having an opening superimposed on the part of the metallization that is exposed by the passivation layer; performing a selective etching of the adhesion work layer through the opening, so as to expose the part of the metallization that is exposed by the passivation layer; and removing the lithographic mask.
13 . The process for manufacturing the electronic device of claim 12 , wherein forming the adhesion work layer comprises performing a deposition.
14 . The process for manufacturing the electronic device of claim 13 , wherein the deposition is a chemical vapour deposition.
15 . The process for manufacturing the electronic device of claim 12 , wherein performing the selective etching comprises performing a dry etching using an etching chemistry that is selective with respect to the material of the adhesion work layer.
16 . The process for manufacturing the electronic device of claim 11 , further comprising forming a protection layer above the adhesion layer and the metallization, where exposed by the passivation layer, such that the adhesion layer is interposed between the passivation layer and the protection layer orthogonally to the surface of the semiconductor body.Join the waitlist — get patent alerts
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