Array substrate and display apparatus

Abstract

An array substrate includes a base substrate; a signal line layer closest to an anode on the base substrate; an anode layer on a side of the signal line layer closest to the anode away from the base substrate; a pixel definition layer; and a plurality of subpixel apertures extending through the pixel definition layer. The anode layer includes a plurality of anodes. The signal line layer closest to the anode comprises a plurality of signal lines. An orthographic projection of a portion of a respective anode in a respective subpixel aperture on the base substrate at least partially overlaps with an orthographic projection of the signal line layer closest to the anode on the base substrate, forming one or more overlapping areas. The one or more overlapping areas have a substantial mirror symmetry with respect to a plane perpendicular to the respective anode and intersecting the respective anode.

1 . An array substrate, comprising:
 a base substrate;   a signal line layer closest to an anode on the base substrate;   an anode layer on a side of the signal line layer closest to the anode away from the base substrate;   a pixel definition layer; and   a plurality of subpixel apertures extending through the pixel definition layer;   wherein the anode layer comprises a plurality of anodes;   the signal line layer closest to the anode comprises a plurality of signal lines;   an orthographic projection of a portion of a respective anode of the plurality of anodes in a respective subpixel aperture of the plurality of subpixel apertures on the base substrate at least partially overlaps with an orthographic projection of the signal line layer closest to the anode on the base substrate, forming one or more overlapping areas; and   the one or more overlapping areas have a substantial mirror symmetry with respect to a plane perpendicular to the respective anode and intersecting the respective anode.   
     
     
         2 . The array substrate of  claim 1 , wherein the signal line layer closest to the anode comprises a plurality of planarization enhancing blocks; and
 an orthographic projection of a respective planarization enhancing block of the plurality of planarization enhancing blocks on the base substrate substantially covers an orthographic projection of at least a main anode part of a respective anode of the plurality of anodes on the base substrate.   
     
     
         3 . The array substrate of  claim 2 , wherein the orthographic projection of the main anode part on the base substrate substantially overlaps with an orthographic projection of a central region of the respective planarization enhancing block on the base substrate; and
 an orthographic projection of a peripheral region of the respective planarization enhancing block on the base substrate surrounds the orthographic projection of the main anode part on the base substrate.   
     
     
         4 . The array substrate of  claim 2 , wherein the plurality of planarization enhancing blocks are parts of a unitary structure. 
     
     
         5 . The array substrate of  claim 1 , wherein an orthographic projection of at least a main anode part of a respective anode of the plurality of anodes on the base substrate is at least partially surrounded by an orthographic projection of portions of the signal line layer closest to the anode on the base substrate in a substantially symmetrical manner. 
     
     
         6 . The array substrate of  claim 1 , wherein the anode layer comprises a first respective anode;
 the signal line layer closest to the anode comprises multiple signal lines;   an orthographic projection of the first respective anode on the base substrate at least partially overlaps with each of orthographic projections of the multiple signal lines on the base substrate; and   the multiple signal lines are substantially evenly distributed along a first direction with respect to a first main anode part of the first respective anode.   
     
     
         7 . The array substrate of  claim 6 , wherein portions of the multiple signal lines, in a region crossing over the first respective anode, have a substantial mirror symmetry with respect to a plane perpendicular to the first respective anode, intersecting the first respective anode, and substantially parallel to a second direction. 
     
     
         8 . The array substrate of  claim 6 , wherein the multiple signal lines comprise a first signal line, a second signal line, and a third signal line;
 the first signal line and the third signal line are two adjacent data lines of a plurality of data lines configured to provide data signals to two adjacent columns of subpixels, respectively; and   the second signal line is a low voltage signal line configured to provide a low voltage signal to a cathode of a light emitting element.   
     
     
         9 . The array substrate of  claim 1 , wherein the anode layer comprises a third respective anode;
 the signal line layer closest to the anode comprises a fourth signal line;   an orthographic projection of the third respective anode on the base substrate at least partially overlaps with an orthographic projection of the fourth signal line on the base substrate; and   a portion of the fourth signal line, in a region crossing over the third respective anode, have a substantial mirror symmetry with respect to a plane perpendicular to the third respective anode, intersecting the third respective anode, and substantially parallel to a second direction.   
     
     
         10 . The array substrate of  claim 9 , wherein the fourth signal line is a voltage supply line configured to provide a voltage supply signal to a pixel driving circuit. 
     
     
         11 . The array substrate of  claim 1 , wherein the anode layer comprises a plurality of anodes;
 the signal line layer closest to the anode comprises a signal line;   an orthographic projection of a respective anode of the plurality of anodes on the base substrate at least partially overlaps with an orthographic projection of the signal line on the base substrate;   a portion of the signal line, in a region crossing over the respective anode, have a substantial mirror symmetry with respect to a plane perpendicular to the respective anode, intersecting the respective anode, and substantially parallel to a second direction;   the signal line layer closest to the anode further comprises a first portion and a second portion;   an orthographic projection of the first portion on the base substrate is on a first side of the orthographic projection of at least a main anode part of an individual anode on the base substrate;   an orthographic projection of a second portion on the base substrate is on a second side of the orthographic projection of at least the main anode part of the individual anode on the base substrate, the first side being opposite to the second side; and   the orthographic projection of the first portion on the base substrate and the orthographic projection of the second portion on the base substrate have a substantial mirror symmetry with respect to a plane perpendicular to the individual anode, intersecting the individual anode, and substantially parallel to the second direction.   
     
     
         12 . The array substrate of  claim 1 , wherein the anode layer comprises a plurality of anodes;
 the signal line layer closest to the anode comprises a first signal line, a second signal line, a third signal line, and a fourth signal line;   an orthographic projection of at least a main anode part of a respective anode of the plurality of anodes on the base substrate at least partially overlaps with an orthographic projection of the first signal line on the base substrate, at least partially overlaps with an orthographic projection of the second signal line on the base substrate, at least partially overlaps with an orthographic projection of the third signal line on the base substrate, and at least partially overlaps with an orthographic projection of the fourth signal line on the base substrate;   the first signal line is on a first side of a central point of the main anode part of the respective anode, the second signal line is on a second side of the central point of the main anode part of the respective anode, the third signal line is on a third side of the central point of the main anode part of the respective anode, and the fourth signal line is on a fourth side of the central point of the main anode part of the respective anode;   the first side and the second side are opposite to each other;   the third side and the fourth side are opposite to each other;   the orthographic projection of the first signal line on the base substrate and the orthographic projection of the second signal line on the base substrate have a substantial mirror symmetry with respect to a plane intersecting the central point of the main anode part of the respective anode, perpendicular to the main anode part of the respective anode, and substantially parallel to a second direction; and   the orthographic projection of the third signal line on the base substrate and the orthographic projection of the fourth signal line on the base substrate have a substantial mirror symmetry with respect to a plane intersecting the central point of the main anode part of the respective anode, perpendicular to the main anode part of the respective anode, and substantially parallel to a first direction.   
     
     
         13 . The array substrate of  claim 12 , wherein the first signal line, the second signal line, the third signal line, and the fourth signal line are signal lines in an interconnected voltage supply network in the signal line layer closest to the anode. 
     
     
         14 . The array substrate of  claim 13 , wherein the interconnected voltage supply network in the third signal line layer has a substantial mirror symmetry with respect to a plane perpendicular to an individual anode, intersecting the individual anode, and substantially parallel to the second direction;
 wherein the array substrate further comprises:   an encapsulating layer on a side of the third signal line layer away from the base substrate; and   a black matric and a color filter on a side of the encapsulating layer away from the third signal line layer.   
     
     
         15 . The array substrate of  claim 1 , wherein the signal line layer closest to the anode comprises a plurality of planarization enhancing blocks; and
 an orthographic projection of a respective planarization enhancing block of the plurality of planarization enhancing blocks on the base substrate substantially covers an orthographic projection of a respective subpixel aperture of the plurality of subpixel apertures on the base substrate.   
     
     
         16 . The array substrate of  claim 15 , wherein an orthographic projection of the respective planarization enhancing block on the base substrate substantially covers an orthographic projection of at least a main anode part of the respective anode on the base substrate. 
     
     
         17 . The array substrate of  claim 15 , wherein the anode layer comprises a first respective anode;
 the plurality of planarization enhancing blocks comprise a first planarization enhancing block;   the plurality of subpixel apertures comprise a first subpixel aperture;   a first main anode part of the first respective anode is in contact with organic materials through the first subpixel aperture;   an orthographic projection of the first planarization enhancing block on the base substrate completely covers an orthographic projection of the first subpixel aperture on the base substrate, and partially overlaps with an orthographic projection of a first main anode part of the first respective anode on the base substrate;   the first main anode part comprises a first edge portion on a first side of the first subpixel aperture, a second edge portion on a second side of the first subpixel aperture, a third edge portion on a third side of the first subpixel aperture, and a fourth edge portion on a fourth side of the first subpixel aperture;   the first side and the second side are opposite to each other;   the third side and the fourth side are opposite to each other;   the orthographic projection of the first planarization enhancing block on the base substrate is non-overlapping with an orthographic projection of the first edge portion on the base substrate, is non-overlapping with an orthographic projection of the second edge portion on the base substrate, is non-overlapping with an orthographic projection of the third edge portion on the base substrate, and is non-overlapping with an orthographic projection of the fourth edge portion on the base substrate;   the first edge portion and the second edge portion have a substantial mirror symmetry with respect to a plane perpendicular to the first main anode part, intersecting the first main anode part, and substantially parallel to a second direction; and   the third edge portion and the fourth edge portion have a substantial mirror symmetry with respect to a plane perpendicular to the first main anode part, intersecting the first main anode part, and substantially parallel to a first direction.   
     
     
         18 . The array substrate of  claim 15 , wherein the anode layer further comprises a second respective anode and a third respective anode;
 the plurality of planarization enhancing blocks further comprise a second planarization enhancing block and a third planarization enhancing block;   the plurality of subpixel apertures further comprise a second subpixel aperture and a third subpixel aperture;   a second main anode part of the second respective anode is in contact with organic materials through the second subpixel aperture;   an orthographic projection of the second planarization enhancing block on the base substrate completely covers an orthographic projection of the second subpixel aperture on the base substrate, and completely covers an orthographic projection of the second main anode part on the base substrate;   a third main anode part of the third respective anode is in contact with organic materials through the third subpixel aperture;   an orthographic projection of the third planarization enhancing block on the base substrate completely covers an orthographic projection of the third subpixel aperture on the base substrate, and partially overlaps with an orthographic projection of the third main anode part on the base substrate;   the third main anode part comprises a corner portion on a first side of the third subpixel aperture and a main portion connected to the corner portion;   the orthographic projection of the third planarization enhancing block on the base substrate is non-overlapping with an orthographic projection of the corner portion on the base substrate, and completely covers an orthographic projection of the main portion on the base substrate;   the corner portion has a substantial mirror symmetry with respect to a plane perpendicular to the third main anode part, intersecting the third main anode part, and substantially parallel to a second direction; and   the main portion has a substantial mirror symmetry with respect to a plane perpendicular to the third main anode part, intersecting the third main anode part, and substantially parallel to the second direction.   
     
     
         19 . A display apparatus, comprising the array substrate of  claim 1 , and one or more integrated circuits connected to the array substrate. 
     
     
         20 . An array substrate, comprising:
 a base substrate;   a first signal line layer on the base substrate;   a first planarization layer on a side of the first signal line layer away from the base substrate;   a second signal line layer on a side of the first planarization layer away from the first signal line layer;   a second planarization layer on a side of the second signal line layer away from the first planarization layer;   a third signal line layer on a side of the second planarization layer away from the second signal line layer;   an anode layer on a side of the third signal line layer away from the base substrate;   a pixel definition layer; and   a plurality of subpixel apertures extending through the pixel definition layer;   wherein the third signal line layer is a signal line layer closest to the anode layer; and   wherein the anode layer comprises a plurality of anodes;   the second signal line layer comprises a plurality of a first voltage supply line extends along a first direction;   the third signal line layer comprises a plurality of a first voltage supply line extends along a second direction;   the third signal line layer comprises a plurality of signal lines;   an orthographic projection of a portion of a respective anode of the plurality of anodes in a respective subpixel aperture of the plurality of subpixel apertures on the base substrate at least partially overlaps with an orthographic projection of the signal line layer closest to the anode on the base substrate, forming one or more overlapping areas; and   the one or more overlapping areas have a substantial mirror symmetry with respect to a plane perpendicular to the respective anode and intersecting the respective anode.