Semiconductor Devices and Methods of Manufacturing Semiconductor Device

Abstract

Embodiments of the present disclosure illustrate a semiconductor device. The semiconductor device comprises a silicon carbide epitaxial layer, comprising: a p-type well region; a junction field effect region adjacent to the p-type well region; a heavily doped n-type region on a surface of the p-type well region; and a heavily doped p-type region below the heavily doped n-type region and within the p-type well region. The semiconductor device further comprises an island-shaped oxide layer on the junction field effect region; a gate oxide layer covering the p-type well region, the junction field effect region, the heavily doped n-type region, the heavily doped p-type region and the island-shaped oxide; and a polycrystalline silicon layer on the gate oxide layer without contacting the island-shaped oxide.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a silicon carbide epitaxial layer comprising:
 a p-type well region; 
 a junction field effect region adjacent to the p-type well region; 
 a heavily doped n-type region on a surface of the p-type well region; and 
 a heavily doped p-type region below the heavily doped n-type region and within the p-type well region; 
   an island-shaped oxide on the junction field effect region;   a gate oxide layer covering the p-type well region, the junction field effect region, the heavily doped n-type region, the heavily doped p-type region and the island-shaped oxide; and   a polycrystalline silicon layer on the gate oxide layer without contacting the island-shaped oxide.   
     
     
         2 . The semiconductor device of  claim 1 , wherein a width of the island-shaped oxide is smaller than a width of the junction field effect region. 
     
     
         3 . The semiconductor device of  claim 1 , wherein a ration of a maximum distance of the polycrystalline silicon layer and the junction field effect region to a width of the junction field effect region is greater than 0.075. 
     
     
         4 . The semiconductor device of  claim 1 , further comprising:
 a first metal layer in contact with the heavily doped p-type region and the heavily doped n-type region through a metal silicide.   
     
     
         5 . The semiconductor device of  claim 1 , further comprising:
 a silicon carbide substrate under the silicon carbide epitaxial layer; and   a second metal layer under the silicon carbide substrate.   
     
     
         6 . A method for manufacturing a semiconductor device, comprising:
 providing a silicon carbide epitaxial layer, wherein a p-type well region, a heavily doped n-type region on a surface of the p-type well region, a heavily doped p-type region below the heavily doped n-type region and within the p-type well region, and a junction field effect region adjacent to the p-type well region are predefined in the silicon carbide epitaxial layer;   depositing an oxide layer;   applying a patterning process to the oxide layer to form an island-shaped oxide, wherein the island-shaped oxide is on the junction field effect region;   depositing a gate oxide layer to cover the p-type well region, the junction field effect region, the heavily doped n-type region, the heavily doped p-type region and the island-shaped oxide; and   depositing a polycrystalline silicon layer on the gate oxide layer.   
     
     
         7 . The method of  claim 6 , wherein a width of the island-shaped oxide is smaller than a width of the junction field effect region. 
     
     
         8 . The method of  claim 6 , wherein a ration of a maximum distance of the polycrystalline silicon layer and the junction field effect region to a width of the junction field effect region is greater than 0.075. 
     
     
         9 . The method of  claim 6 , further comprising:
 forming a first metal layer; and   patterning the first metal layer to form a source contact and a gate contact.   
     
     
         10 . The method of  claim 6 , further comprising:
 forming a silicon carbide substrate under the silicon carbide epitaxial layer; and   forming a second metal layer under the silicon carbide substrate.