Increasing data-dependent memory prefetcher accuracy using memory metadata

Abstract

Data-dependent (memory) prefetcher support is described. In some examples, the data-dependent (memory) prefetcher utilizes metadata to predict if a data word is a valid pointer before doing a prefetch. Data words that are not deemed to be valid pointers are not used to prefetch. The metadata may be linear or physical depending on the example.

What is claimed is: 
     
         1 . An apparatus comprising:
 decoder circuitry configured to decode at least an instance of a single first instruction, the instance of the single first instruction to include one or more fields for an opcode, a destination memory location, and a source register identifier, wherein the opcode is to indicate that a pointer stored in the identified source register is to be compressed and the compressed pointer stored at the destination memory location; and   execution circuitry configured to execute the decoded instance of the single first instruction to compress a pointer stored in the identified source register and store the compressed pointer stored at the destination memory location.   
     
     
         2 . The apparatus of  claim 1 , wherein the pointer is a 64-bit value. 
     
     
         3 . The apparatus of  claim 2 , wherein the pointer is to be compressed by extracting a least significant 32 bits of the pointer. 
     
     
         4 . The apparatus of  claim 1 , wherein the execution circuitry is further to set a pointer indicator bit that is to indicate when a data granule contains a compressed pointer. 
     
     
         5 . The apparatus of  claim 1 , wherein
 the decoder circuitry is configured to decode at least an instance of a single second instruction, the instance of the single second instruction to include one or more fields for an opcode, a source memory location, and a destination register identifier, wherein the opcode is to indicate that a compressed pointer stored in the identified source memory location is to be decompressed and the decompressed pointer stored in the identified destination register; and   the execution circuitry is configured to execute the decoded instance of the single second instruction to decompress a compressed pointer stored in the source memory location and store the decompressed pointer stored in the identified destination register.   
     
     
         6 . The apparatus of  claim 5 , wherein the compressed pointer is to be decompressed by a concatenation of the compressed pointer with a 32 most significant bits from a memory address of the source memory location. 
     
     
         7 . The apparatus of  claim 1 , further comprising:
 a data dependent memory prefetcher to prefetch a line based at least in part on a decompressed pointer.   
     
     
         8 . A non-transitory machine-readable medium storing at least one instruction which when executed by a processor is to cause the processor to perform a method, the method comprising:
 decoding at least an instance of a single first instruction, the instance of the single first instruction to include one or more fields for an opcode, a destination memory location, and a source register identifier, wherein the opcode is to indicate that a pointer stored in the identified source register is to be compressed and the compressed pointer stored at the destination memory location; and   executing the decoded instance of the single first instruction to compress a pointer stored in the identified source register and store the compressed pointer stored at the destination memory location.   
     
     
         9 . The non-transitory machine-readable medium of  claim 8 , wherein the pointer is a 64-bit value. 
     
     
         10 . The non-transitory machine-readable medium of  claim 9 , wherein the pointer is to be compressed by extracting a least significant 32 bits of the pointer. 
     
     
         11 . The non-transitory machine-readable medium of  claim 8 , further comprising setting a pointer indicator bit that is to indicate when a data granule contains a compressed pointer. 
     
     
         12 . The non-transitory machine-readable medium of  claim 8 , further comprising:
 decoding at least an instance of a single second instruction, the instance of the single second instruction to include one or more fields for an opcode, a source memory location, and a destination register identifier, wherein the opcode is to indicate that a compressed pointer stored in the identified source memory location is to be decompressed and the decompressed pointer stored in the identified destination register; and   executing the decoded instance of the single second instruction to decompress a compressed pointer stored in the source memory location and store the decompressed pointer stored in the identified destination register.   
     
     
         13 . The non-transitory machine-readable medium of  claim 12 , wherein the compressed pointer is to be decompressed by a concatenation of the compressed pointer with a 32 most significant bits from a memory address of the source memory location. 
     
     
         14 . A system comprising:
 memory to at least store instance of a single first instruction;   decoder circuitry configured to decode at least the instance of a single first instruction, the instance of the single first instruction to include one or more fields for an opcode, a destination memory location, and a source register identifier, wherein the opcode is to indicate that a pointer stored in the identified source register is to be compressed and the compressed pointer stored at the destination memory location; and   execution circuitry configured to execute the decoded instance of the single first instruction to compress a pointer stored in the identified source register and store the compressed pointer stored at the destination memory location.   
     
     
         15 . The system of  claim 14 , wherein the pointer is a 64-bit value. 
     
     
         16 . The system of  claim 15 , wherein the pointer is to be compressed by extracting a least significant 32 bits of the pointer. 
     
     
         17 . The system of  claim 15 , wherein the execution circuitry is further to set a pointer indicator bit that is to indicate when a data granule contains a compressed pointer. 
     
     
         18 . The system of  claim 14 , wherein
 the decoder circuitry is configured to decode at least an instance of a single second instruction, the instance of the single second instruction to include one or more fields for an opcode, a source memory location, and a destination register identifier, wherein the opcode is to indicate that a compressed pointer stored in the identified source memory location is to be decompressed and the decompressed pointer stored in the identified destination register; and   the execution circuitry is configured to execute the decoded instance of the single second instruction to decompress a compressed pointer stored in the source memory location and store the decompressed pointer stored in the identified destination register.   
     
     
         19 . The system of  claim 18 , wherein the compressed pointer is to be decompressed by a concatenation of the compressed pointer with a 32 most significant bits from a memory address of the source memory location. 
     
     
         20 . The system of  claim 14 , further comprising:
 a data dependent memory prefetcher to prefetch a line based at least in part on a decompressed pointer.