Method, circuit, and apparatus for anti-skid brake control in motor vehicles

Abstract

Anti-skid brake control system in which the slip ratio of a wheel is calculated from a simulative vehicle speed which is obtained by simulatively detecting the vehicle speed and speed of a wheel to be controlled. Logic circuitry discriminates whether or not the slip ratio is within a predetermined slip range of 20-60% producing large adhesive coefficients. Hydraulic brake pressure is reduced in response to decleration of the wheel and is increased in response to acceleration of the wheel when the slip ratio of the wheel is within the predetermined slip range.

What is claimed is: 
     
       1. An anti-skid control apparatus for an automobile, which comprises: sensor means adapted to produce outputs corresponding respectively to respective rotating speeds of a plurality of vehicle wheels;   a simulative vehicle speed generating circuit adapted to detect simulatively the wheel speed from the outputs of said sensor means thereby to produce a simulative vehicle signal;   a wheel speed detecting circuit adapted to derive a wheel speed signal of a wheel to be controlled from said outputs of said sensor means;   a deceleration counting circuit adapted to count the decelerated speed of the wheel to be controlled;   a comparing logical circuit adapted to compare said simulative vehicle signal with said wheel speed signal thereby to calculate the slip ratio and to discriminate whether or not said slip ratio is within the range of a predetermined slip of 20 to 60%;   a correcting deceleration circuit adapted to correct the decelerated or accelerated speed obtained in response to the output of said logical circuit, said decelerated or accelerated speed being obtained by a calculating operation of said deceleration counting circuit; and   control means for controlling the braking hydraulic pressure of the wheel to be controlled in response to the output of said correcting deceleration circuit when said wheel slip ratio is outside the predetermined range of the slip.   
     
     
       2. A simulative circuit for simulating speed of an automobile under braking, which comprises: a. a speed detecting circuit adapted to generate an electric wave signal having a frequency corresponding to the rotational speed of the wheels of said automobile;   b. a modulation frequency pulse generating circuit connected at its input side to said speed detecting circuit so as to receive said electric wave signal and adapted to generate a frequency decreasing pulse train once during a first wave part of said electric wave signal, said first wave part having a predetermined potential;   c. a timing pulse generating circuit connected to said electric circuit so as to receive said electric wave signal and adapted to generate a timing pulse train per a predetermined time interval during a second wave part of said electric wave signal, said wave part differing from said first wave part;   d. a pulse conversion circuit comprising two counting circuits for counting separately the abovementioned modulation frequency pulse trains;   an addition circuit for adding the results of said counting circuits, a correction circuit connected to said addition circuit thereby to receive the added result of said addition circuit and adapted to correct only a certain wave part of said electric wave signal in response to said added result, and a control circuit for adding a supplemental correction to the counted result of one of said counting circuits and for memorizing the thus added data;   one of said counting circuits being connected to said modulations frequency pulse generating circuit (b) and said timing pulse generating circuit (c) in such a manner that said one of the counting circuits carries out its counting operation per a certain wave part of said electric wave signal and is reset to zero during the period of time corresponding to the other wave part of said electric wave signal and, said counting operation and resetting being repeated, while the other counting circuit is connected to said modulation frequency pulse generating circuit (a) and said timing pulse generating circuit (c) in such a manner that said other counting circuit carries out once the counting operation in synchronism with the counting operation of said one counting circuit and then carries out correction of said counted result and memorization of the thus corrected result, said memorized result being added to the next counted result of said one counting circuit by means of said addition circuit.