US3959763AExpiredUtility

Four terminal varistor

Assignee: GEN SIGNAL CORPPriority: Apr 17, 1975Filed: Apr 17, 1975Granted: May 25, 1976
Est. expiryApr 17, 1995(expired)· nominal 20-yr term from priority
H10W 72/07554H10W 72/536H10W 42/80H01C 7/102
49
PatentIndex Score
13
Cited by
7
References
11
Claims

Abstract

A four terminal varistor is shown as a device for providing fail-safe circuit protection under certain conditions. The failure of any lead connected to the four terminal varistor will shut down the protected load so that the load cannot operate under unsafe conditions. By its nature, a varistor can absorb voltage peaks and protect a load from high voltage and/or a current resulting from high voltage. One pair of leads from the varistor is connected to the power supply and the other pair of leads to the load. Thus, if any lead is broken, there will be no power to the load. A variation provides additional protection in the event the metal coating on the semiconductor, to which two of the leads are attached, becomes detached from the semiconductor. In case of such detachement, the electrical connection between the two leads is broken. For this purpose, the metalized coating on the semiconductor is divided into two separate areas, one for each lead. The areas are electrically coupled together by a mechanically weak link and/or a link which may be embedded within the semiconductor material.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A varistor comprising in combination: a. a body having a voltage dependent nonlinear impedance; and   b. first and second pairs of electrical contact means coupled to first and second metalized areas, respectively, bonded to said body for providing for electrical connections between said body and external components.   
     
     
       2. The combination as set forth in claim 1, wherein each of said first and second metalized areas are subdivided into first and second segments joined by a link and wherein each of said contact means is coupled to an individual one of said segments. 
     
     
       3. The combination as set forth in claim 2, wherein said link is embedded in said body. 
     
     
       4. The combination as set forth in claim 2, wherein the electrical connection formed by said link joining a pair of segments will be broken in response to a mechanical stress which breaks the bond between either or both of the segments and said body. 
     
     
       5. A varistor comprising in combination: a. a semiconductor having a voltage dependent nonlinear impedance;   b. first and second metalized faces having linear impedance bonded to said semiconductor for making electrical connections thereto; and wherein   c. said first and second metalized faces comprise first and second segments joined by a conductive link for extending individual electrical connections from each of said segments to external components.   
     
     
       6. The combination as set forth in claim 5, wherein the conduction between said first and second segments will be broken in response to either, or both, of said first and second segments losing their bond to said semiconductor. 
     
     
       7. The combination as set forth in claim 6, wherein said link is embedded in said semiconductor. 
     
     
       8. A semiconductor device comprising in combination: a. a body having a voltage dependent nonlinear impedance;   b. first and second pairs of opposed metalized faces having linear impedance and coupled to said body for making electrical contact therewith;   c. terminal means coupled to each of said faces for electrically connecting each of said faces to external components; and   d. first and second linear impedance coupling means for electrically coupling the faces of said first and second pairs of faces, respectively.   
     
     
       9. The combination as set forth in claim 8 and including first and second coupling means for electrically coupling the faces of said first and second pairs of faces, respectively. 
     
     
       10. The combination as set forth in claim 9, wherein said coupling means is coupled to the opposite sides of said faces from that to which said terminal means is coupled. 
     
     
       11. The combination as set forth in claim 10, wherein said coupling means is embedded in said semiconductor material.

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