Detector having a constant false alarm rate

Abstract

A detector which is subject to temperature variations and power supply drift including a tunnel diode circuit having first and second stable states and a variable threshold that is sensitive to noise and input signals within a useful frequency band and produces output signals when the amplitude of the noise or the input signals exceeds the instantaneous value of the variable threshold to cause the tunnel diode to switch from its first low voltage stable state to its second high voltage stable state. A control circuit coupled to the tunnel diode produces a square range-gate pulse having a pulse width which determines the interval during which the detector is sensitized and produces a reset pulse in response to the leading edge of the square range-gate pulse which sets the tunnel diode in its first stable state. A logic circuit also coupled to the tunnel diode produces an output signal indicative of the occurrence of noise or an input signal having an amplitude which exceeds the instantaneous value of the variable threshold occurring during the interval established by the range-gate pulse produced by the control circuit.

We claim: 
     
       1. In a constant false alarm rate detector for use with a signal source which provides input signals at known repetition rates within a useful frequency band to said detector in an environment where noise is present, said detector including a range gate generator, a long time constant feedback circuit and an improved variable threshold means comprising bistable circuit means having a first terminal coupled to an output terminal of said long time constant feedback circuit, a variable threshold, and first and second stable states for switching from said first stable state to said second stable state in response to noise or input signals of an amplitude greater than the instantaneous value of the variable threshold,   control circuit means coupled between said range gate generator and said first terminal of the bistable circuit means for setting the bistable circuit means to said first stable state and for regulating the period of time during which the detector is sensitive, and   logic circuit means coupled to said control circuit means, said first terminal of said bistable circuit means and an input terminal of said long time constant feedback circuit for providing an output signal in response to the bistable circuit means switching from said first stable state to said second stable state during the period of time said detector is sensitive.   
     
     
       2. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 1 wherein the bistable circuit means includes a tunnel diode in which its positive electrode is said first terminal and its negative electrode is connected to ground. 
     
     
       3. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 1 wherein said control circuit means includes means for producing a first pulse for setting said bistable circuit means to said first stable state and means for producing a second pulse for regulating the period of time during which the detector is sensitive. 
     
     
       4. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 3 wherein said means for producing said first and second pulses includes amplifier means coupled to differentiator means. 
     
     
       5. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 4 wherein said amplifying means and said differentiator means include a transistor in combination with a resistor and a capacitor. 
     
     
       6. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 3 wherein said means for producing a second pulse includes means for varying the occurrence of the leading edge and the pulse width of said second pulse. 
     
     
       7. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 6 wherein said means for varying the occurrence of the leading edge and the pulse width of said second pulse includes a first monostable multivibrator for producing a first variable pulse width pulse and a second monostable multivibrator responsive to the trailing edge of said first variable pulse width pulse for producing said second pulse having a variably occurring leading edge and a variable pulse width. 
     
     
       8. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 1 wherein said logic circuit means includes first AND gate means having a first input terminal coupled to the output terminal of said bistable circuit means and a second input terminal coupled to the output terminal of said range gate generator means for providing an output signal in response to said bistable circuit means switching from said first stable state to said second stable state during the period of time the detector is sensitive. 
     
     
       9. In a constant false alarm rate detector including an improved variable threshold means as recited in claim 8 further including: first delay circuit means having an input terminal coupled to the input terminal of said range gate generator and having a delay T 1  associated therewith, and   second AND gate means having a first terminal coupled to the output terminal of said first AND gate means and a second input terminal coupled to the output terminal of said delay circuit means for producing an output signal in response to said output signal from said first AND gate means only after a predetermined time following the occurrence of said first pulse.   
     
     
       10. In a constant false alarm rate detector as recited in claim 8 wherein said logic circuit means further includes amplifier means in series combination with inverter means, said combination being coupled between said bistable circuit means and said first AND gate means for providing an output signal of a specific polarity and sufficient amplitude to produce an output signal from said first AND gate in response to said bistable circuit means switching from said first stable state to said second stable state.   
     
     
       11. In a constant false alarm detector including an improved variable threshold means as recited in claim 8 wherein said logic circuit means further includes: second delay circuit means coupled between the output terminal of said range gate generator means and said second input terminal of said first AND gate means for inhibiting said first AND gate means from changing its output state until after said bistable circuit means is set to its first low voltage stable state.   
     
     
       12. In a constant false alarm detector including an improved variable threshold means as recited in claim 11 wherein said first delay circuit means includes: a pair of series connected inverter circuits.