Digital control system for motors

Abstract

A phase-control type of closed-loop control system for motors. A reference signal generator generates a digital reference signal having a binary value which varies between first and second values n times during each a-c input voltage cycle. An error signal generator generates a digital error signal having a binary value which varies in accordance with the difference between the desired and actual values of a motor variable such as armature current. The most significant bits of the digital error signal are utilized to select the angular range within which firing signals will be applied to a phase-controlled rectifier network that is arranged to drive the motor. The least significant bits of the digital error signal are compared with the digital reference signal to determine the time, within the selected angular range, when firing signals will be applied to the controlled rectifier network. By use of this technique, the control system provides both precisely timed control events and a range of control which extends over the entire motoring and inverting regions of motor operation.

What I claim is: 
     
       1. A digital d-c motor control circuit comprising: an a-c input for connection to an a-c source,   a d-c output for connection to a motor,   a controlled rectifier circuit for controlling the flow of power between the a-c input and the d-c output,   a firing control circuit for applying firing signals to the controlled rectifier circuit to control the magnitude and direction of power flow therethrough, said firing control circuit including: (a) reference signal generating means for generating a periodic digital reference signal having at least eight bits, the reference signal being maintained in a predetermined phase and frequency relationship to the voltage at the a-c input,   (b) error signal generating means for generating a digital error signal having a digital value which varies in accordance with the difference between a command signal indicative of the desired value of a motor variable and a feedback signal indicative of the actual value of that motor variable, the error signal having at least two more higher order bits than the reference signal,   (c) means for applying firing signals to the controlled rectifier circuit within angular ranges determined by said at least two more higher order bits and substantially at times determined by the remaining bits of the error signal and the digital reference signal,     whereby the digital control circuit may control the operation of a motor over both the monitoring and inverting ranges thereof.   
     
     
       2. A digital d-c motor control circuit as set forth in claim 1 wherein the error signal generating means includes a voltage controlled oscillator responsive to the magnitude of the difference between the command signal and the feedback signal, an up/down counter, means for connecting the voltage controlled oscillator to the up/down counter to control the counting frequency thereof, and means for controlling the up/down direction of counting in said up/down counter in accordance with the sign of the difference between the command signal and the feedback signal. 
     
     
       3. A digital d-c motor control circuit as set forth in claim 1 wherein the reference signal generating means includes a voltage controlled oscillator, a digital phase comparator, a reference counter, and decoding means for generating a plurality of sequencing signals, the number of sequencing signals being equal to the desired number of controlled rectifier firing events during each full cycle of the a-c input voltage, and means for connecting the oscillator, comparator, counter and decoding means together, in a phase locked loop configuration, to assure that the reference signal established by the reference counter and the sequencing signals established by the decoding means are maintained in a predetermined frequency and phase relationship to the voltage at the a-c input and to each other. 
     
     
       4. A digital d-c motor control circuit as set forth in claim 3 wherein the means for applying firing signals to the controlled rectifier circuit includes comparing means for comparing the reference signal to said remaining bits of the error signal to provide a timing signal indicative of the times, within said angular ranges, at which firing signals are to be applied to the controlled rectifier circuit. 
     
     
       5. A digital d-c motor control circuit as set forth in claim 4 wherein the means for applying firing signals to the controlled rectifier circuit includes firing window generating means for generating firing window signals from the sequencing signals, angular range control means for combining the information carried by the firing window signals with the information carried by said at least two more higher order bits to generate a firing pattern signal, and output control means for combining the timing signal with the firing pattern signal to provide firing signals for the controlled rectifier circuit. 
     
     
       6. A digital motor control circuit as set forth in claim 4 wherein the means for applying firing signals to the controlled rectifier circuit includes a plurality of tri-state buffer networks each having a plurality of signal inputs, a plurality of signal outputs and at least two control inputs, means for applying the sequencing signals to the signal inputs of the buffer networks, means for connecting the signal outputs of the buffer networks to the controlled rectifier circuit, means for applying at least one of said at least two more higher order bits to one control input of each buffer network and means for connecting the comparing means to the other control input of each buffer network. 
     
     
       7. A digital d-c motor control circuit as set forth in claim 1 including means for limiting the error angle between the firing signals and the voltage at the a-c input to values which are equal to or in excess of zero degrees and which are equal to or less than 180°. 
     
     
       8. A digital d-c motor control circuit as set forth in claim 1 including means for inhibiting increases in the value of the error signal when the error signal attempts to increase above a value corresponding to an error angle of 180° and means for inhibiting decreases in the value of the error signal when the error signal attempts to decrease below a value corresponding to an error angle of zero degrees. 
     
     
       9. A digital d-c motor control circuit as set forth in claim 1 including means for preventing the application of firing signals to the controlled rectifier circuit when the feedback signal exceeds a predetermined excessive value and when the error signal has a value which indicates that the error angle is between 90° and 180°. 
     
     
       10. A digital d-c motor control circuit as set forth in claim 1 wherein the reference signal varies through its cycle n times during each cycle of the voltage at the a-c input, n being a number equal to the desired number of controlled rectifier firing events during each cycle of the voltage at the a-c input. 
     
     
       11. A digital d-c motor control circuit comprising: an a-c input for connection to an a-c source,   a d-c output for connection to a motor,   a plurality of thyristors for controlling the flow of power between the a-c input and the d-c output,   a firing control circuit for applying firing signals to the thyristors and thereby determining the magnitude and direction of power flow therethrough, said firing control circuit including: (a) reference signal generating means for generating a periodic digital reference signal that is locked in phase with the voltage at the a-c input, the reference signal having a digital value which varies from a first preselected value to a second preselected value n times during each full cycle of the voltage at the a-c input, n being an integer greater than 1,   (b) means for generating an error signal having a digital value which varies in accordance with the time accumulated difference between a command signal indicative of the desired value of a motor variable and a feedback signal indicative of the actual value of that motor variable, the error signal including a plurality of lower order bits equal in number to the number of bits of the reference signal and including at least two higher order bits,   (c) means for applying firing signals to the thyristors within angular ranges determined by the higher order bits of the error signal and at times when the lower order bits of the error signal are substantially equal to those of the reference signal,     whereby the digital control circuit may control the operation of a motor over both the motoring and inverting ranges thereof.   
     
     
       12. A digital d-c motor control circuit as set forth in claim 11 including means for limiting the error angle between the firing signals and the voltage at the a-c input to values which are equal to or in excess of zero degrees and which are equal to or less than 180°. 
     
     
       13. A digital d-c motor control circuit as set forth in claim 11 including means for inhibiting increases in the value of the error signal when the error signal attempts to increase above a value corresponding to an error angle of 180° and means for inhibiting decreases in the value of the error signal when the error signal attempts to decrease below a value corresponding to an error angle of zero degrees. 
     
     
       14. A digital d-c motor control circuit as set forth in claim 11 including means for preventing the application of firing signals to the thyristors when the feedback signal exceeds a predetermined excessive value and when the error signal has a value which indicates that the error angle is between 90° and 180°. 
     
     
       15. A digital d-c motor control circuit comprising: an a-c input for connection to an a-c source,   a d-c output for connection to a motor,   a plurality of thyristors for controlling the flow of power between the a-c input and the d-c output,   a firing control circuit for applying firing signals to the thyristors and thereby determining the magnitude and direction of power flow therethrough, said firing control circuit including: (a) reference signal generating means for generating a periodic digital reference signal having at least eight bits, the reference signal being maintained in a predetermined frequency and phase relationship with respect to the voltage at the a-c input and having a period equal to 360° of the a-c input voltage divided by an integer n equal to the number of thyristor firings which are to occur during each 360° of the a-c input voltage,   (b) means for generating an error signal having a digital value which varies in accordance with the difference between a command signal indicative of the desired value of a motor variable and a feedback signal indicative of the actual value of that motor variable, the error signal including a plurality of lower order bits equal in number to the number of bits of the reference signal and including sufficient higher order bits to allow the provision of at least n/2 increments of error angle, and   (c) means for applying firing signals to the thyristors at angles which include from 0 to (n/2)-1 of said angular increments, dependent upon the higher order bits of the reference signal, plus an angular remainder dependent upon the lower order bits of the error signal.     
     
     
       16. A digital d-c motor control circuit as set forth in claim 15 wherein the means for applying firing signals to the thyristors includes comparing means for comparing the reference signal to an equal number of the lower order bits of the error signal to fix said angular remainder. 
     
     
       17. A digital d-c motor control circuit a set forth in claim 15 including means for limiting the error angle between the firing signals and the voltage at the a-c input to values which are equal to or in excess of zero degrees and which are equal to or less than 180°. 
     
     
       18. A digital d-c motor control circuit as set forth in claim 15 including means for inhibiting increases in the value of the error signal when the error signal attempts to exceed a value corresponding to an error angle of 180° and means for inhibiting decreases in the value of the error signal when the error signal attempts to decrease below a value corresponding to an error angle of zero degrees. 
     
     
       19. A digital d-c motor control circuit as set forth in claim 15 including means for preventing the application of firing signals to the thyristors when the feedback signal exceeds a predetermined excessive value and when the error signal has a value which indicates that the error angle is between 90° and 180°. 
     
     
       20. A digital d-c motor control circuit as set forth in claim 15 wherein the width of each non-zero increment of error angle is equal to 180° divided by the number of a-c input voltage degrees occupied by the period of the reference signal. 
     
     
       21. A digital d-c motor control circuit as set forth in claim 15 wherein changes in the number of angular increments occur smoothly as a result of a change of one count in the lowest order bit of the error signal. 
     
     
       22. A digital d-c motor control circuit as set forth in claim 15 wherein the plurality of thyristors includes six thyristors connected in a three phase full wave configuration, wherein the reference signal undergoes six cycles during each cycle of the a-c input voltage and wherein the error signal is adapted to selectively establish angular increments of 0°, 60° and 120°. 
     
     
       23. A digital d-c motor control circuit comprising: an a-c input for connection to an a-c source,   a d-c output for connection to a motor,   a controlled rectifier circuit for controlling the flow of power between the a-c input and the d-c output, the controlled rectifier circuit including a plurality of gate controlled switching devices,   a firing control circuit for applying firing signals to the gate controlled switching devices and thereby determining the magnitude and direction of power flow through the controlled rectifier circuit, said firing control circuit including:   (a) reference signal generating means for generating a periodic digital reference signal that is locked in phase with the voltage at the a-c input, the reference signal having an M bit digital value which varies from a first preselected value to a second preselected value n times during each full cycle of the voltage at the a-c input, M and n being integer s greater than one,   (b) error signal generating means for generating a digital error signal having an M + p bit digital value which varies in accordance with the difference between a command signal indicative of the desired value of a motor variable and a feedback signal indicative of the actual value of that motor variable, p being an integer greater than or equal to 1,   (c) firing time control means responsive to the lower M bits of the error signal and to the reference signal for generating a firing time control signal which fixes the time at which a gate controlled switching device will be gated on, and   (d) firing signal generating means responsive to the firing time control signal and to the upper p bits of the digital error signal for applying firing signals to the gate controlled switching devices, the firing signal generating means utilizing said upper p bits to select one of at least two possible ranges of firing angle within which firing signals will be applied to the gate controlled switching devices and utilizing said firing time control signal to fix the firing angle within the selected range.   
     
     
       24. A digital d-c motor control circuit as set forth in claim 23 wherein the error signal generating means includes a voltage controlled oscillator responsive to the magnitude of the difference between the command signal and the feedback signal, an up/down counter, means for connecting the voltage controlled oscillator to the up/down counter to control the counting frequency thereof, and means for controlling the up/down direction of counting in said up/down counter in accordance with the sign of the difference between the command signal and the feedback signal. 
     
     
       25. A digital d-c motor control circuit as set forth in claim 23 wherein the reference signal generating means includes a voltage controlled oscillator, a digital phase comparator, a reference counter, and decoding means for generating a plurality of sequencing signals, the number of sequencing signals being equal to the desired number of controlled rectifier firing events during each full cycle of the a-c input voltage, and means for connecting the oscillator, comparator, counter and decoding means together, in a phase locked loop configuration, to assure that the reference signal established by the reference counter and the sequencing signals established by the decoding means are maintained in a predetermined frequency and phase relationship to the voltage at the a-c input and to each other. 
     
     
       26. A digital d-c motor control circuit as set forth in claim 23 wherein the firing time control means comprises a digital comparator having one set of inputs connected to receive the reference signal and having another set of inputs connected to receive the error signal. 
     
     
       27. A digital d-c motor control circuit as set forth in claim 25 wherein the firing signal generating means includes firing window generating means for generating firing window signals from the sequencing signals, angular range control means for combining the information carried by the firing window signals means with the information carried by the upper p bits of the error signal to generate a firing pattern signal, and output control means for combining the firing time control signal with the firing pattern signal to provide the desired firing signals. 
     
     
       28. A digital d-c motor control circuit as set forth in claim 25 wherein the firing signal generating means includes a plurality of tri-state buffer networks each having a plurality of signal inputs, a plurality of signal outputs and two control inputs, means for applying the sequencing signals to the signal inputs of the buffer networks, means for connecting the signal outputs of the buffer networks to the gate controlled switching devices, means for controlling one control input of each buffer network in accordance with the upper p bits of the error signal and means for applying the firing time control signal to the other control input of each buffer network. 
     
     
       29. A digital d-c motor control circuit as set forth in claim 23 including means for limiting the error angle between the firing signals and the voltage at the a-c input to values which are equal to or in excess of zero degrees and which are equal to or less than 180°. 
     
     
       30. A digital d-c motor control circuit as set forth in claim 23 including means for inhibiting increases in the value of the error signal when the error signal attempts to exceed a value corresponding to an error angle of 180° and means for inhibiting decreases in the value of the error signal when the error signal attempts to decrease below a value corresponding to an error angle of zero degrees. 
     
     
       31. A digital d-c motor control circuit as set forth in claim 23 including means for deriving three non-overlapping clock signals, the first of the clock signals serving to initiate changes in the value of the reference signal, the second clock signal serving to initiate changes in the value of the error signal and the third clock signal serving to initiate the firing time control signal. 
     
     
       32. A digital d-c motor control circuit as set forth in claim 23 including means for preventing the application of firing signals to the gate controlled switching devices when the feedback signal exceeds a predetermined excessive value and when the error signal has a value which indicates that the error angle is between 90° and 180°. 
     
     
       33. A digital d-c motor control circuit comprising: an a-c input for connection to an a-c source,   a d-c output for connection to a motor,   a plurality of gate controlled switching devices for controlling the flow of power between the a-c input and the d-c output,   a firing control circuit for applying firing signals to the gate controlled switching devices and thereby determining the magnitude and direction of power flow therethrough, said firing control circuit including:   (a) reference signal generating means for generating a periodic digital reference signal having at least eight bits, the digital reference signal being maintained in a predetermined frequency and phase relationship to the voltage at the a-c input,   (b) error signal generating means for generating an error signal having a digital value which varies in accordance with the difference between a command signal indicative of the desired value of a motor variable and a feedback signal indicative of the actual value of that motor variable, the error signal having at least two bits in excess of the number of bits comprising the reference signal,   (c) comparing means for comparing the bits of the reference signal with an equal number of the least significant bits of the error signal,   (d) means responsive to the sequencing signals, to the comparing means and to the excess bits of the error signal for applying firing signals to the gate controlled switching devices, the firing signals occurring within angular ranges determined by the excess bits of the error signal and at angles determined by the comparing means.   
     
     
       34. A digital d-c motor control circuit as set forth in claim 33 including means for limiting the error angle between the firing signals and the voltage at the a-c input to values which are equal to or in excess of zero degrees and which are equal to or less than 180°. 
     
     
       35. A digital d-c motor control circuit as set forth in claim 33 including means for deriving three non-overlapping clock signals, the first of the clock signals serving to initiate changes in the value of the reference signal, the second clock signal serving to initiate changes in the value of the error signal and the third clock signal serving to synchronize the comparing means. 
     
     
       36. A digital d-c motor control circuit as set forth in claim 33 wherein the reference signal varies through its cycle n times during each full cycle of the voltage at the a-c input, n being a number equal to the desired number of gate controlled switching device firing events during each cycle of the voltage at the a-c input.