Semiconductor memory device with a plurality of memory cells and a sense amplifier circuit thereof

Abstract

A driving circuit is provided for driving a sense amplifier, especially in a semiconductor memory device of one transistor cell type. The driving circuit is comprised of MIS transistors of which gates are connected in common via at least one resistor and which have different current amplification factors. A driving signal is directly applied to the MIS transistor having lower current amplification factor in the MIS transistors and it is then applied to the MIS transistor having higher current amplification factor in the MIS transistors through the resistor with time delay for establishing a gradually increasing current from the sense amplifier to the ground to ensure the correct sensing of information stored in the memory cell.

We claim: 
     
       1. A sense amplifier circuit for amplifying a voltage difference between separated two conductors comprising, (a) a flip-flop circuit having a pair of cross-coupled amplifying elements, said two conductors being connected to said flip-flop circuit, and   (b) a driving circuit connected to said flip-flop circuit for controlling a current flowing through said flip-flop circuit, said driving circuit having at least two MIS transistors having gates which are connected via a resistive means, wherein a signal for driving said driving circuit is directly applied to the gate of one of said MIS transistors and wherein said signal is applied to the other of said MIS transistors through said resistive means with time delay.   
     
     
       2. The sense amplifier circuit as recited in claim 1 wherein said driving circuit comprises a pair of MIS transistors, and wherein a current amplification factor of one of said pair of MIS transistors of said driving circuit is smaller than that of the other of said pair of MIS transistors. 
     
     
       3. The sense amplifier circuit as recited in claim 2 wherein the gates of said pair of MIS transistors in said driving circuit consist of molybdenum. 
     
     
       4. The sense amplifier circuit as recited in claim 2 wherein said resistive means connected between the gates of said pair of MIS transistors in said driving circuit is a diffused resistor. 
     
     
       5. The sense amplifier circuit as recited in claim 2 which comprises a further MIS transistor having a gate connected to said other one of said pair of MIS transistors via a second resistor. 
     
     
       6. The sense amplifier circuit as recited in claim 1 which comprises a further MIS transistor being connected in parallel to said other of said pair of MIS transistors. 
     
     
       7. A semiconductor memory device with a plurality of memory cells formed in a semiconductor substrate, comprising, (a) one common line,   (b) a plurality of flip-flop circuits connected to said one common line,   
     
     
       (c) a pair of bit lines connected to each of said flip-flop circuits, (d) a plurality of semiconductor memory cells connected to said bit lines, and   (e) a driving circuit for controlling a current flowing through one of said flip-flop circuits connected to said one common line, said driving circuit having at least two MIS transistors having gates connected via a resistor, and a signal for driving said driving circuit being directly applied to said gate of one of said MIS transistors, and said signal being applied to the other of said MIS transistors through said resistor with time delay.