Level regulator for automotive vehicles

Abstract

A digital or analogue regulator circuit for activating a pump or pressure reducing valve, whose action respectively raises and lowers the body of a vehicle relative to the rear axle, each operating with a time delay so that temporary level changes will not initiate a regulatory process. Feedback circuits provide hysteresis. In both embodiments, level changes are represented by changes in the collector potential of a transistor and positive and negative feedback are provided to the base of the transistor to create the hysteresis or dead zone. In the digital embodiment, a counter generates the delay and the negative feedback.

We claim: 
     
       1. In a motor vehicle having an axle (10) and a vehicle body, level controllable spring means intercoupled between said body and said axle for raising and lowering said body with respect to said axle upon, respectively, pressure increase and pressure decrease in said spring means, level regulator means cooperating with said spring means for increasing and reducing the pressure therein in response to a first and second activating signal, respectively, means (16, 17) continuously furnishing an actual level signal indicative of the actual level of said body of said vehicle;   a regulating system comprising   error signal furnishing means (49, 51; 49, 40) continuously furnishing an error signal indicative of the magnitude and direction of said actual level of said body of said motor vehicle relative to a reference level;   delay means (24) connected to said error signal furnishing means, for furnishing a delayed error signal with a predetermined delay time interval following receipt of said error signal;   and activating signal furnishing means (20, 23, 25, 26) for furnishing said first and second activating signal in response to a delayed error signal indicative of a required raising and lowering of said body of said vehicle, respectively, and for terminating the furnishing of said activating signals substantially immediately upon receipt of a zero error signal indicative of an actual level equal to said reference level, said activating signal furnishing means comprising switch means (20, 22) for furnishing said activating signal when in a first state and blocking said activating signal when in a second state respectively,   and connecting means for interconnecting said switch means between said error signal furnishing means and said delay means in such a manner that said switch means is switched from said second to said first state only in response to said delayed error signal and from said first to said second state when said error signal is indicative of zero error.   
     
     
       2. Apparatus as set forth in claim 1, wherein said error signal furnishing means includes an amplifier element (49) having an output electrode for furnishing said error signal. 
     
     
       3. Apparatus as set forth in claim 1, wherein said switch means comprises first switch means (20) for furnishing said first activating signal and second switch means (22) for furnishing said second activating signal. 
     
     
       4. Apparatus as set forth in claim 1, wherein said connecting means comprises acceleration switch means (42) for switching said switch means to said second stable state when the acceleration of said vehicle exceeds a predetermined acceleration. 
     
     
       5. Apparatus as set forth in claim 1, further comprising positive feedback means (45) interconnected between said level regulator means and said error signal furnishing means, for creating a switching hysteresis for the furnishing of said first and second activating signals. 
     
     
       6. Apparatus as set forth in claim 4, wherein said vehicle further has brake lights and a brake light switch for energizing said brake lights when closed; further comprising blocking circuit means interconnected between said brake light switch and said switch means, for maintaining said switch means in said second stable state when said brake light switch is closed.   
     
     
       7. Apparatus as set forth in claim 1, wherein said delay means comprises integrator means. 
     
     
       8. Apparatus as set forth in claim 7, wherein said integrator means comprises clock pulse generator means for furnishing a sequence of clock pulses when energized, and counting means (59) connected to said clock pulse generator means for counting said clock pulses and furnishing said delay error signal when a predetermined count on said counting means is reached. 
     
     
       9. Apparatus as set forth in claim 8, further comprising first logic circuit means (51) connected to said error signal furnishing means, for furnishing a direction signal indicative of the sign of said error signal; and wherein said counting means comprises an up/down counter having an up/down control input (64) connected to said first logic circuit means in such a manner that the direction of count of said counter is controlled by said direction signal.   
     
     
       10. Apparatus as set forth in claim 9, further comprising means for presetting said counting means to a first preset number, said counting means counting up or down from said first preset number in correspondence to said direction signal; and wherein said counting means furnishes said delayed error signal when the count on said counting means reaches a first predetermined number when counting in the up direction or a second predetermined number when counting in the down direction.   
     
     
       11. Apparatus as set forth in claim 10, further comprising feedback circuit means (74-76) interconnected between said counting means and said error signal furnishing means, for furnishing a negative feedback signal having an amplitude adapted to change the sign of said error signal if the magnitude of said error signal is less than a predetermined magnitude when the count on said counter is a predetermined feedback count, said predetermined feedback count preceding said first and second predetermined numbers, whereby said counting means is blocked from furnishing said delayed error signal when the magnitude of said error signal is less than a predetermined magnitude. 
     
     
       12. Apparatus as set forth in claim 11, wherein said preset means comprises means for presetting said counting means to a first preset number approximately half way between said first and second predetermined numbers; and wherein said preset means comprises second logic circuit means (51) for setting said counting means to said first preset number in response to a change of sign of said direction signal.   
     
     
       13. Apparatus as set forth in claim 12, wherein said second logic circuit means comprises an exclusive NOR gate having a first input directly connected to said first logic circuit means and having a second input, and differentiating circuit means for connecting said second input to said first logic circuit means. 
     
     
       14. Apparatus as set forth in claim 9, wherein said activating signal furnishing means comprises first and second activating logic circuit means (79; 80, 81) responsive to said direction signal and said delayed error signal. 
     
     
       15. Apparatus as set forth in claim 10, further comprising positive feedback means (52) connected between the output of said first logic circuit means and said error signal furnishing means.