US4198690AExpiredUtility

Magnetic bubble domain memory device with integrated buffer

32
Assignee: ROCKWELL INTERNATIONAL CORPPriority: Aug 10, 1977Filed: Aug 10, 1977Granted: Apr 15, 1980
Est. expiryAug 10, 1997(expired)· nominal 20-yr term from priority
G11C 19/0883
32
PatentIndex Score
0
Cited by
4
References
16
Claims

Abstract

There is disclosed an apparatus and method for constructing integrated buffered devices for use with magnetic bubble domain memories. A small storage loop acts as the buffer memory and is interfaced with the main storage loops through a new circuit component. The new circuit component performs the function of transferring a bubble from one track, holds the bubble for a prescribed number of cycles, and then transfers the bubble to another track. Thus, any arbitrarily located bubble within the storage loop can be transferred to any arbitrary location in the buffer loop.

Claims

exact text as granted — not AI-modified
Having thus described the preferred embodiment of the invention, what is claimed is: 
     
       1. A magnetic bubble domain device comprising, a plurality of adjacent propagation patterns which form portions of at least two independent propagation paths,   a recirculating pattern interposed between but separate from said adjacent propagation patterns,   said recirculating pattern comprises a single distinct element, and   conductor means associated with each of said propagation patterns and said recirculating pattern to selectively cause magnetic bubble domains to be transferred between the adjacent propagation patterns and said recirculating pattern in either direction.   
     
     
       2. The device recited in claim 1 wherein said recirculating pattern is arranged to operate on only one magnetic bubble domain at a time.   
     
     
       3. The device recited in claim 1 wherein said adjacent propagation patterns comprise columns of of chevron elements.   
     
     
       4. The device recited in claim 1 wherein said adjacent propagation patterns include at least one half-disc element.   
     
     
       5. The device recited in claim 1 wherein said adjacent propagation patterns include at least one pick-ax element.   
     
     
       6. The device recited in claim 1 wherein said conductor means includes two separate conductors,   each separate conductor associated with said recirculating pattern and one of said adjacent propagation patterns.   
     
     
       7. The device recited in claim 1 wherein said conductor means and each of said propagation patterns is formed as a separate level.   
     
     
       8. The device recited in claim 1 wherein said two propagation paths comprise a storage loop and a buffer loop respectively.   
     
     
       9. The device recited in claim 8 including a plurality of storage loops and a plurality of buffer loops respectively coupled to each other, and   an output access path coupled to each of said buffer loops.   
     
     
       10. The device recited in claim 9 including input means selectively coupled to each of said storage loops.   
     
     
       11. The device recited in claim 9 wherein said storage loops and said buffer loops are selectively connected in series via the respective recirculating patterns thereby to provide parallel outputs to said output access path.   
     
     
       12. The device recited in claim 8 wherein said buffer loop has less capacity than said storage loop and is arranged to store information therein which is a duplicate of information in said storage loop whereby ready access to the information is achieved via said buffer loop.   
     
     
       13. The device recited in claim 12 wherein the information stored in said buffer loop is readily interchanged with the information in said storage loop whereby the most recently accessed information is retained in said buffer loop.   
     
     
       14. The device recited in claim 1 wherein said two propagation paths comprise a major access loop and a buffer loop, respectively, and   a plurality of storage loop, selectively coupled to said major access loop.   
     
     
       15. The device recited in claim 14 wherein said major access loop receives information in parallel from said storage loops,   said buffer loop receives information in series from said major access loop.   
     
     
       16. The device recited in claim 1 including source means for supplying control signals to said conductor means to control the transfer of magnetic bubble domains.

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