Temperature compensated switching circuit

Abstract

Temperature compensation is provided in a switching circuit for the channel resistance of a MOS/FET transistor through which a voltage source is applied to an output terminal. The gate-source voltage of the transistor is varied directly with temperature changes to hold the channel resistance substantially constant within the switching circuit. In a particular embodiment, at least one output level of a pulse amplifier is controlled through the temperature compensated switching circuit of the invention. The other output level of this pulse amplifier is applied through a bipolar transistor of a second switching circuit in another embodiment. The base current of the bipolar transistor is varied inversely with temperature to hold the saturation voltage drop thereacross substantially constant within the second switching circuit. High temperature nonsaturating means for interrupting the base current to the bipolar transistor is combined with this temperature compensation to enhance the turn-on speed of the bipolar transistor, in still another embodiment.

What I claim is: 
     
       1. A switching circuit of the type wherein a voltage source is applied through a MOS/FET transistor to the output terminal thereof, a signal at the input terminal thereof controls the conductivity of said MOS/FET transistor, and compensation means is provided for varying the gate-source voltage of said MOS/FET transistor to hold the drain-source channel resistance thereof substantially constant as temperature changes, which compensation means comprises: a bipolar transistor having base, emitter and collector electrodes, and having a base-emitter junction;   means for conditioning said bipolar transistor for supplying a current from its collector electrode that increases with temperature owing to the negative temperature coefficient of the base-emitter junction of said bipolar transistor, including   a resistor with a first end to which the emitter electrode of said bipolar transistor connects and with a second end, and includiing   means for applying a voltage between the base electrode of said bipolar transistor and the second end of said resistor;   means responsive to a positive temperature coefficient current for applying a voltage between the source and gate electrodes of said MOS/FET transistor and exhibiting a temperature coefficient to hold the drain-source channel resistance thereof substantially constant; and   means for applying at least at selected times the collector electrode current of said bipolar transistor as said positive temperature coefficient current.   
     
     
       2. The switching circuit of claim 1 wherein said means for applying at least at selected times includes a further bipolar transistor having its collector electrode connected to said means responsive to a positive temperature coefficient current, having its emitter electrode connected to the collector electrode of said bipolar transistor, and having a base electrode. 
     
     
       3. The switching circuit of claim 2 wherein said signal at the input terminal thereof is coupled to the base electrode of said further bipolar transistor for conditioning said further bipolar transistor for conduction at said selected times. 
     
     
       4. A switching circuit of the type wherein a voltage source is applied through a MOS/FET transistor to the output terminal thereof, a signal at the input terminal thereof controls the conductivity of said MOS/FET transistor, and improved compensation means is provided to vary the gate-source voltage of said MOS/FET transistor to hold the drain-source channel resistance thereof substantially constant as temperature changes, said compensation means comprising: a comparator, a diode and a second transistor;   said comparator having a signal input connection and a signal output connection for supplying comparator output signal, with the input terminal of the switching circuit being said comparator signal input connection;   the gate of the MOS/FET transistor being separately connected to said comparator signal output connection and to the voltage source respectively through said diode and the conduction path of said second transistor, with said diode being poled to increase the gate-source voltage of the MOS/FET transistor in accordance with enhanced channel conductivity thereof and with the control electrode of said second transistor being connected to said comparator signal output connection; and   wherein said comparator includes a first bipolar transistor disposed to have the negative temperature coefficient demonstrated by the emitter-base junction resistance thereof result in the collector current thereof having a positive temperature coefficient to vary said comparator signal output in accordance with substantially constant channel resistance through the MOS/FET transistor as temperature changes.   
     
     
       5. The switching circuit of claim 4 wherein said comparator further includes second and third bipolar transistors and first, second, third, fourth, fifth and sixth resistors; said first, second and third resistors being successively connected in series between the source voltage and a reference voltage; the base of said second bipolar transistor being connected at the interconnection between said first and second resistors; the base of said first bipolar transistor being connected at the interconnection between said second and said third resistors; one side of the main conduction paths through said second and third bipolar transistors being commonly connected to said reference voltage through the main conduction path of said first bipolar transistor in series with said fourth resistor; the other side of the conduction paths through said second and third bipolar transistors being connected to the voltage source through said fifth and sixth resistors, respectively; said signal input being the base of said third bipolar transistor and said signal output being the interconnection between the conduction path of said third bipolar transistor and said sixth resistor; and wherein the values of said first, second and third resistors are selected for biasing the base of said first bipolar transistor in accordance with the limitation of current flow through the main conduction path of said third bipolar transistor to below saturation levels. 
     
     
       6. The switching circuit of claim 5 wherein the source voltage is positive and the MOS/FET transistor is a p-channel type, while said second transistor and all of said bipolar transistors are NPN types. 
     
     
       7. In a pulse amplifier of the type wherein high and low voltage sources are separately applied through first and second switching circuits to the output terminal thereof and a signal at the input terminal thereof controls both switching circuits, the improvement wherein at least the first switching circuit applies its voltage source through a MOS/FET transistor and includes compensation means for varying the gate-source voltage of said MOS/FET transistor to hold the drain-source channel resistance thereof substantially constant as temperature changes; and   wherein the second switching circuit applies its voltage source through a first bipolar transistor and includes compensation means for varying the flow of base current into said bipolar transistor to hold the saturation voltage thereof substantially constant as temperature changes.   
     
     
       8. The pulse amplifier of claim 7 wherein said bipolar transistor compensation means includes a Schottky transistor having its base connected to receive the control signal and having its main conductive path connected between the high and low voltage sources through a resistor, the base of said first bipolar transistor being connected to the interconnection between said resistor and the main conductive path of said Schottky transistor, said resistor and the saturation voltage of said first bipolar transistor both having positive temperature coefficients so that the base current of said first bipolar transistor varies inversely with temperature to result in a substantially constant saturation voltage thereacross as temperature changes. 
     
     
       9. The pulse amplifier of claim 7 wherein said bipolar transistor compensation means includes second and third bipolar transistors, first and second diodes, and first, second, third, fourth and fifth resistors; the main conduction path of said second transistor having one side thereof connected to the voltage source of the first switching circuit through said first resistor, and having the other side thereof connected both to the base of said third transistor and to the voltage source of the second switching circuit through said second resistor; the main conduction path of said third transistor having one side thereof connected to the voltage source of the second switching circuit and the other side thereof connected separately to one terminal of said first diode through said third resistor and to the voltage source of the first switching circuit through said fourth resistor; the other electrode of said first diode being commonly connected to one electrode of said second diode, to the base of said second transistor, and to the voltage source of the first switching circuit through said fifth resistor; said first and second diodes each being poled to conduct current away from the base of said second transistor; the input terminal of the second switching circuit being the other electrode of said second diode and the base of said first bipolar transistor being connected at the interconnection of said third and fourth resistors with the main conduction path of said third transistor; said fourth resistor and the saturation voltage of said first transistor both having positive temperature coefficients so that the base current of said first bipolar transistor varies inversely with temperature to result in a substantially constant saturation voltage thereacross as temperature changes; said third and fifth resistors being selected to hold the quiescent collector-emitter voltage of said third transistor at a level to preclude the saturated operation thereof. 
     
     
       10. The pulse amplifier of claim 9 wherein a P-N junction in fourth and fifth bipolar transistors are respectively connected as said first and second diodes. 
     
     
       11. The pulse amplifier of claim 10 wherein the voltage source of the second switching circuit is low and all of said bipolar transistors are NPN types having substantially the same base-emitter voltage characteristic, said P-N junctions in said fourth and fifth transistors being the base-emitter junctions thereof while the collector-base junctions thereof are shunted, the collector-emitter voltage of said third transistor being fixed at one-half the common base-emitter voltage characteristic of said bipolar transistors.