US4253107AExpiredUtility

Integrated circuit with ion implanted hall-cell

Assignee: SPRAGUE ELECTRIC COPriority: Oct 6, 1978Filed: Oct 6, 1978Granted: Feb 24, 1981
Est. expiryOct 6, 1998(expired)· nominal 20-yr term from priority
H10N 59/00H10B 61/00
74
PatentIndex Score
23
Cited by
7
References
7
Claims

Abstract

A Hall-cell of relatively high sensitivity and low power consumption is provided in an isolated epitaxial pocket of an integrated circuit. The epitaxial layer is of opposite conductivity type to that of the supporting silicon substrate. The Hall-cell body of opposite conductivity type consists of an ion-implanted surface portion of the pocket and may have a thickness that is limited by a buried layer of the same type as that of the substrate. This Hall-cell is capable of being manufactured with closely controlled electrical properties and by steps imposing few restraints on the quality of other components in the integrated circuit.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. An integrated circuit comprising a single crystal semiconductor substrate of one conductivity type; an epitaxial semiconductor layer of the opposite conductivity type carried on one face of said substrate; means for electrically isolating a plurality of pockets in said epitaxial layer from one another, and; a Hall-cell of said opposite conductivity type being formed in one of said pockets, said Hall-cell containing ion implanted impurities of said opposite conductivity type which have a maximum concentration in a plane that is parallel to the outer surface of said epitaxial layer for increasing the conductivity of said Hall-cell above that of unaltered opposite conductivity portions of said epitaxial layer and for concentrating currents flowing through said Hall-cell in a region near said plane. 
     
     
       2. The integrated circuit of claim 1 additionally comprising a bipolar transistor being formed in another of said pockets, the collector of said transistor being comprised of an unaltered opposite conductivity portion of said epitaxial layer. 
     
     
       3. The integrated circuit of claim 1 wherein said plane of maximum impurity concentration lies near said epitaxial surface. 
     
     
       4. The integrated circuit of claims 2 and 3 wherein the concentration of opposite conductivity type impurities in said unaltered portions of said epitaxial layer is greater near said face than near said outer surface. 
     
     
       5. The integrated circuit of claim 1 additionally comprising a buried layer of said one conductivity type being located at the interface of said one pocket and said substrate, said buried layer extending partway into said epitaxial layer to confine said Hall-cell to a thin outer surface region of said one pocket, the conductivity of said buried layer being greater than that of said substrate. 
     
     
       6. The integrated circuit of claim 1 additionally comprising a resistor being formed in another of said pockets, the body of said resistor containing the same concentration of opposite type impurities as that of said Hall-cell at any given distance from said outer surface whereby the temperature coefficient of resistance of said resistor is the same as that of said Hall-cell. 
     
     
       7. The integrated circuit of claim 1 wherein said one conductivity type is p-type.

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