US4270573AExpiredUtility

Controller for fluid flow systems

83
Assignee: HYDRONIC SYSTEMS INCPriority: Jul 25, 1978Filed: Sep 17, 1979Granted: Jun 2, 1981
Est. expiryJul 25, 1998(expired)· nominal 20-yr term from priority
Y10T137/86461G05B 19/07A01G 25/162G05B 19/102
83
PatentIndex Score
33
Cited by
3
References
7
Claims

Abstract

A controller which can be set to operate a group of sprinkler control valves, which can be easily set and tested for proper automatic operation, and which can operate a sprinkler system in a variety of ways. The controller includes a clock, a series of dividers for dividing down the frequency of the clock, and a group of controls that can be operated to begin sprinkling cycles at predetermined times and close the sprinkling control valves after predetermined durations. A selector control can be utilized to effectively increase the frequency of the clock, as by bypassing a divider stage, to operate the system at a very rapid rate, which is useful in testing the system for automatic operation after it is set and for repetitive short duration sprinkling cycles. The controller has a cascade input that enables the beginning of a cycle of operation by an external signal, to permit repeated cycling of the system, and to synchronize a group of controllers.

Claims

exact text as granted — not AI-modified
The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows: 
     
       1. A fluid flow controller comprising: a clock means which generates clock signals;   a timing circuit having an input connected to said clock means and having at least one output, said timing circuit including a dividing means, for generating a valve opening signal on an output after a predetermined settable number of clock signals to turn on a valve, and for generating a valve closing signal on an output after another predetermined settable second number of clock signals to turn off the valve; and selector means coupled to said clock means for operating it at a plurality of different frequencies, whereby to enable different speed automatic cycling of a system at a predetermined setting.   
     
     
       2. The controller described in claim 1 wherein: said clock means includes an oscillator, and at least one frequency divider stage connected to said oscillator; and   said selector means includes means for bypassing at least one divider stage of said clock means to generate a higher frequency output.   
     
     
       3. The controller described in claim 1 including: means responsive to said timing circuit for generating a plurality of additional valve opening and closing signals for opening and closing a plurality of additional valves substantially in sequence; and   cascade means having a cascade input terminal and responsive to a signal thereon for generating a valve opening signal and later a valve closing signal on said output of said timing circuit; and   means coupling the last of the valve closing signals to said cascade input terminal, whereby to enable continuous cascade sprinkling, which can avoid saturation when the clock means is set at a high frequency.   
     
     
       4. The controller described in claim 1 including: a plurality of day setting switch means operable to select which days the valve can be opened; and wherein   said clock means is operable at a first normal frequency wherein different day setting switch means control said valve at 24 hour intervals; and   said clock means is operable at a high second frequency which is more than one order of magnitude higher than said normal frequency, whereby to enable testing of automatic system operation over a cycle which would last many days at the normal frequency, in a fraction of a day.   
     
     
       5. A fluid flow controller comprising; an oscillator;   a divider connected to said oscillator for generating a plurality of output signals of lower frequency than said oscillator output;   a first switch having an output, said switch being settable to connect any of a plurality of said divider output signals to said first switch output;   a second switch having an output, said second switch being settable to connect any of a plurality of said divider output signals to said second switch output;   a circuit connected to said first and second switches, for generating on and off valve operating signals in response to the outputs of said first and second switch outputs;   said divider including a plurality of divider stages normally connected in series; and   a selector coupled to said divider and settable to bypass at least one of said stages, to generate said on and off signals more frequently.   
     
     
       6. A method for operating a watering system which includes at least one solenoid operated valve, comprising: generating clock signals at a first normal rate;   generating a plurality of timing signals of different frequencies which are each of a particular ratio to the clock signals, on a plurality of different terminals;   operating selector switches to turn on a valve upon the occurance of a signal on one of said terminals, and to turn off the valve upon the succeeding occurance of a signal on a particular one of said terminals; and   temporarily increasing the frequency of the clock signals by a predetermined factor of more than ten whereby to enable testing of the system within a short time for fast cycling and/or enable rapid system time setup.   
     
     
       7. Apparatus for operating a watering system which includes at least one solenoid operated valve, comprising: means for generating clock signals at a first normal rate;   means for generating a plurality of timing signals of different frequencies which are each of a particular ratio to the clock signals, on a plurality of different terminals;   selector switch means which are operable to turn on a valve upon the occurrance of a signal on one of said terminals, and to turn off the valve upon the succeeding occurrance of a signal on a particular one of said terminals; and   means for temporarily increasing the frequency of the clock signals by a predetermined factor of more than ten, whereby to enable testing of the system within a short time for fast cycling and/or enable rapid system time setup.

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