US4320247AExpiredUtility

Solar cell having multiple p-n junctions and process for producing same

75
Assignee: MASSACHUSETTS INST TECHNOLOGYPriority: Aug 6, 1980Filed: Aug 6, 1980Granted: Mar 16, 1982
Est. expiryAug 6, 2000(expired)· nominal 20-yr term from priority
H10F 77/148H10F 71/121H10F 19/10H10F 10/14Y02P70/50Y02E10/547Y10S438/919
75
PatentIndex Score
33
Cited by
13
References
18
Claims

Abstract

A solar cell with improved energy conversion characteristics is formed from ordinary Czochralski or other types of silicon crystals that are sliced parallel to the growth axis or pulling direction. The slices are heat treated at a sufficiently high temperature and for a sufficiently long period of time to activate oxygen donor states in the slices. The heat treatment is of sufficient duration that at periodic maxima of oxygen concentration in the crystal it produces n-type regions where a background p-type dopant is overcompensated. Each n-type region thus formed is adjacent to a p-type region with a p-n junction therebetween. Collector contacts are applied at the faces of the slices to permit collection of carriers.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A process for fabricating multiple p-n junctions from a silicon crystal pulled from the melt, that comprises: forming a slice of the silicon crystal along the pulling direction; heat treating the slice at a temperature that is high enough to activate oxygen donor states in the slice and for a time period sufficient for activation to occur and at the maxima of the oxygen concentration to overcompensate the background p-type dopant present in the ordinary silicon crystal and lead to n-type regions, each n-type region being adjacent to a p-type region with a p-n junction therebetween; and applying electrical contacts selectively to the p-type regions and the n-type regions to permit collection of charge carriers therein. 
     
     
       2. A process as defined by claim 1 wherein said temperature is about 450° C. 
     
     
       3. A process as defined by claim 2 wherein said time period is about fifty hours. 
     
     
       4. A process as claimed in claim 1 wherein said electrical contacts are applied to a p+ region and an n+ region applied respectively at parallel faces of the longitudinal slice and which includes the further steps of diffusing a p+ type material at one of the parallel faces and an n+ type material at the other of said faces. 
     
     
       5. A process as claimed in claim 1 that includes the further steps of diffusing a p+ material at one face of the slice of the silicon crystal to form a p+ region, diffusing an n+ material at another face of the slice of the silicon material to form an n+ region and applying contacts respectively to the p+ region and the n+ region, the combination of the p+ region and its associated contact and the n+ region and its associated contact constituting said electrical contacts. 
     
     
       6. A process as claimed in claim 5 wherein the p+ region and the n+ region are applied respectively at parallel faces of the slice of the silicon crystal. 
     
     
       7. A process as claimed in claim 6 wherein the parallel faces are the major surfaces of the slice of the silicon crystal. 
     
     
       8. A process as claimed in claim 6 wherein the parallel faces are minor faces of the crystal. 
     
     
       9. A process as claimed in claim 1 wherein said silicon crystal is an ordinary Czochralski crystal grown for device applications and in which said slice is a longitudinal slice. 
     
     
       10. A semiconductor device that comprises: a plurality of p-regions and a plurality of n-regions in a structure in which the p-regions and n-regions are located along one direction such that a p-region is positioned between two n-regions and vice versa, with a p-n junction between each p-region and the adjacent n-regions and vice versa; a p+ diffusion region at one surface of the device in electrical contact with the p-regions at one transverse end of each p-region; an n+ diffusion region at another surface of the device in electrical contact with the n-regions at one transverse end of each n-region; first electrode means in electrical contact with the p+ diffusion region; and second electrode means in electrical contact with the n+ diffusion region, said p-regions and said n-regions occurring in a single as grown silicon crystal that is grown along said one direction and is doped with a p-type material to produce said p-regions and where said n-regions are striations of maxima of oxygen concentration occurring in said p-doped silicon crystal that are heat treated to activate oxygen donor states. 
     
     
       11. A device as claimed in claim 10 wherein said device comprises a slice of said as grown silicon crystal cut parallel to said one direction, and in which the p+ diffusion region is at one major surface of the device and the n+ diffusion region is at the other major surface of the device and in which light will be received at at least one surface, which light serves to create charge carriers at the p-n junctions. 
     
     
       12. A device as claimed in claim 10 in which at least one of the first electrode means and the second electrode means comprises a bus and at least one finger in electrical contact with the associated diffusion region to permit light to strike the surface at which the particular electrode is located. 
     
     
       13. A device as claimed in claim 12 in which both the first electrode means and the second electrode means comprise a bus and at least one finger in electrical contact with the associated diffusion region. 
     
     
       14. A device as claimed in claim 10 wherein said structure is in the form of a slab having two major surfaces or faces and four minor surfaces or faces, wherein the p+ diffusion region and the first electrode means are disposed at one of the four minor surfaces or faces, and wherein the n+ diffusion region and the second electrode means are disposed at another of the four minor surfaces or faces to permit the whole of the major surfaces to be available to accept light. 
     
     
       15. A device as claimed in claim 10 wherein the electrode means are metal strips deposited on the associated surface and in electrical contact with the associated diffusion region. 
     
     
       16. A semiconductor device that comprises at least several p-regions and at least several n-regions in a structure in which the p-regions and the n-regions are in a spaced juxtaposed relationship to one another along one direction such that each p-region is positioned between two n-regions and vice versa with a p-n junction between each p-region and the adjacent n-region, which p-regions and n-regions receive light which create charge carriers within the device, and means to effect electrical connection to the p-regions and the n-regions, said p-regions and said n-regions occurring in a single as grown silicon crystal that is grown along said one direction and is doped with a p-type material to produce said p-regions and where said n-regions are striations of maxima of oxygen concentration occurring in said p-doped silicon crystal that are heat treated to activate oxygen donor states. 
     
     
       17. A device as claimed in claim 16 in which the means to effect electrical connection comprises a p+ region in contact with said p-regions and an n+ region in contact with said n-regions. 
     
     
       18. A device as claimed in claim 17 that further includes electrical connectors respectively in contact with the p+ region and the n+ region.

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