G2 Set-up circuit for a television receiver

Abstract

A circuit is disclosed for establishing proper video output voltages in a color television receiver prior to setting the receiver's G2 voltage. In the preferred embodiment, the circuit includes three emitter follower stages, each coupled to the output of a video amplifier. The collectors of the emitter follower stages are coupled to a supply voltage through a common resistance. A two position switch is connected across the common resistance such that, during normal receiver operation, closure of the switch shunts the common resistance. When G2 set-up is to be effected, the switch is opened so that a predetermined voltage is dropped across the common resistance and the three emitter follower stages have similar, predetermined D.C. output voltages.

What is claimed is: 
     
       1. In a television receiver whose CRT includes three cathodes and a G2 electrode, and which has three video output amplifiers for driving the cathodes, a set-up circuit for establishing three similar video output voltages for use in properly setting the G2 electrode voltage, comprising: three video output transistors, each having an emitter, a collector and a base, and each receiving the output of one of the video amplifiers at its base;   three emitter resistances, each coupled to the emitter of one of the video output transistors for developing a video output voltage thereacross;   a common collector load;   means for coupling the collector load between a supply voltage and the collectors of the three output transistors; and   means for shunting the load during normal receiver operation to apply the supply voltage to the collectors of the output transistors, and for removing the shunt from the common load during G2 set-up so that the load is coupled in series with the collectors of all the output transistors for dropping a selected voltage thereacross and establishing a common, selected output voltage at the emitters of the video output transistors.   
     
     
       2. A set-up circuit as set forth in claim 1 wherein each of the emitter resistances is coupled between the emitter of a video output transistor and the input of its associated video amplifier. 
     
     
       3. A set-up circuit as set forth in claim 1 wherein said shunting means includes a two position switch connected in parallel with the common collector load. 
     
     
       4. A set-up circuit as set forth in claim 3 wherein the common collector load constitutes a resistor whose value is selected to establish a predetermined D.C. output voltage at the emitters of the output transistors when the switch is open.