Method of coding data bits on a recording medium, arrangement for putting the method into effect and recording medium having an information structure

Abstract

"Method of coding data bits on a recording medium, arrangement for putting the method into effect and recording medium having an information structure." The so-called Miller modulation has the disadvantage that a direct current is generated in the information channel. When this modulation method is used for magnetical or optical recording, the result is that the amplitude values and the zero crossings are deformed as these channels cannot transmit direct current. According to the invention, in order to obtain, a d.c. free modulation, the Miller modulation concept is modified such that sequences of data bits which, after coding, result in the introduction of a d.c. component are coded differently. It appears that, the frequency zero excepted, a good suppression of the response is obtained also in a fairly wide low-frequency portion of the spectrum. The invention further relates to an arrangement for putting the method into effect and to a recording medium, for example an optical disc, having an information structure which is coded by means of the d.c.-free coding.

What is claimed is: 
     
       1. A method of encoding a stream of data bits of a first and second type as level transitions or absence thereof in consecutive bit cells each of which is associated with a respective one of said data bits in said stream, said stream being comprised of consecutive words of a first and second type, said words of said first type being defined by one or more consecutive bits of said second type and said words of said second type being defined by one data bit of said second type followed by one or more consecutive bits of said first type, said method comprising the steps of: producing a level transition in the middle of an associated bit cell upon occurrence of a data bit of said first type in said stream,   producing a level transition in the beginning of an associated bit cell upon occurrence of a data bit of the second type in said stream unless said second type data bit immediately follows a data bit of said first type in said stream, in which event no transition is produced in the bit cell associated with that second type bit, and   upon occurrence of a word of said second type having an even number of data bits of said first type, producing a transition at the boundary between the two bit cells associated with the last and second last first type data bit of that word while suppressing the production of a transition in the middle of each of said two bit cells so as to remove d.c. components therefrom.   
     
     
       2. A method of encoding a stream of data bits of a first and second type as level transistions or absence thereof in consecutive bit cells each of which is associated with a respective one of said data bits in said stream, said stream being comprised of consecutive words of a first and second type, said words of said first type being defined by one or more consecutive bits of said first type and said words of said second type being defined by a single data bit of said second type immediately followed by a sequence of m consecutive data bits of said first type, where m is equal to or greater than zero, which sequence is immediately followed by a single data bit of said second type, said method comprising the steps of: producing a level transition in the middle of an associated bit cell upon occurrence of a data bit of said first type in said stream,   producing a level transition in the beginning of an associated bit cell upon occurrence of a data bit of the second type in said stream unless an immediately preceding bit cell contains a transition in the middle thereof, in which event no transition is produced in the bit cell immediately following said preceding bit cell, and   upon occurrence of a word of said second type having an even number of data bits of said first type, producing a transition at the boundary between the two bit cells associated with the last and second last data bit of said first type in said sequence of that word while suppressing the production of a transition in the middle of each of said two bit cells and suppressing the production of a transition at the beginning of the bit cell associated with the last second type data bit of that word so as to remove d.c. components therefrom.   
     
     
       3. The method according to claim 2 wherein the production of a transition in the bit cell associated with the first data bit of a word which immediately follows a word of said second type having an even number of data bits of said first type is suppressed. 
     
     
       4. An apparatus for encoding a stream of binary data bits of a first and second type as signal level transitions or absence thereof in consecutive bit cells defined by consecutive intervals of a clock signal, said stream of data bits being comprised of consecutive words of a first and second type, said words of said first type being defined by one or more bits of said second type and said words of said second type being defined by one bit of said second type followed by one or more consecutive bits of the first type, said apparatus having a first input for receiving the stream of data bits and a second input for receiving the clock signal which is in synchronism with the data bits, said apparatus further comprising means for generating a signal transition in the middle of a clock interval upon occurrence of a data bit of the first type in the stream, means for generating a signal transition at the beginning of a clock interval upon occurrence of a data bit of the second type in said stream, means for suppressing said generation of a transition at the beginning of a clock interval when a data bit of said second type immediately follows a data bit of said first type in said stream, means for detecting a word of said second type having an even number of said data bits of said first type, means for indicating the second last and the last data bit of said first type in said word with said even number of first type data bits, means for suppressing the generation of transitions in the middle of the clock interval associated with said last and second last bit, and means for generating a transition between said clock intervals associated with said last and second last bits.