US4468755AExpiredUtility

Document size conversion circuit for a document filing system

87
Assignee: TOKYO SHIBAURA ELECTRIC COPriority: Oct 31, 1980Filed: Oct 30, 1981Granted: Aug 28, 1984
Est. expiryOct 31, 2000(expired)· nominal 20-yr term from priority
Inventors:Kazuhiko Iida
H04N 2201/0089H04N 1/32561H04N 1/2195G06T 3/40H04N 1/2175G06K 17/0016H04N 2201/0082H04N 1/32512H04N 1/32529H04N 2201/0081H04N 1/3875H04N 2201/0087
87
PatentIndex Score
44
Cited by
9
References
4
Claims

Abstract

Picture information stored in a memory device is read out and written into a page buffer and visually displayed on the screen of a CRT display under control of an interface unit for display, through a size conversion circuit.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A document size conversion circuit for a document filing system comprising: an information input terminal to which pieces of line picture information are supplied;   a plurality of memories each adapted to store one of said pieces of line picture information supplied to the terminal;   means for forming a matrix array of local picture information consisting of bits extracted from said plurality of memories;   means for obtaining a picture dot position in said matrix array of local picture information, the picture dot position corresponding to a size conversion rate;   means for obtaining an average gray level of said matrix array of local picture information with respect to said picture dot position; and   comparator means for comparing said average gray level and a predetermined slice level to form size converted data.   
     
     
       2. A document size conversion circuit according to claim 1, wherein said picture dot position obtaining means includes: conversion rate setting data supplying means; and   X-direction and Y-direction distance calculating means for calculating an address designating signal from said size conversion rate setting data.   
     
     
       3. A document size conversion circuit according to claim 2, wherein said average gray level obtaining means includes arithmetic memory means for storing a plurality of average gray level data by using said address designating signal. 
     
     
       4. A document size conversion circuit according to claim 1, wherein said matrix array of local picture information forming means includes a plurality of latches for latching said bits extracted from said memories.

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