Method of making isolation grooves by over-filling with polycrystalline silicon having a difference in impurity concentration inside the grooves followed by etching off the overfill based upon this difference

Abstract

A groove having a semiconductor layer buried therein is formed on one main surface of a semiconductor substrate, said groove providing a region for separating adjacent semiconductor elements. In the first step, a groove is formed on the substrate surface, followed by depositing a semiconductor layer thick enough to fill the groove. A substantial difference in impurity concentration is provided between the semiconductor layer within the groove and the other region of the semiconductor layer. The semiconductor layer is selectively allowed to remain within the groove by utilizing the difference in impurity concentration.

What is claimed is: 
     
       1. A method of manufacturing a semiconductor circuit comprising the steps in the order mentioned below of: (a) forming a groove on one main surface of a semiconductor substrate such that an island region is defined by said groove;   (b) oxidizing said main surface of said substrate including at least the surface of said groove to form an oxide film;   (c) depositing a first semiconductor layer on said oxide film formed in step (b);   (d) implanting an impurity by ion implantation such that said first semiconductor layer within said groove alone is doped with said impurity, thereby creating a difference between the impurity concentration of said first semiconductor layer within said groove and the impurity concentration of said first semiconductor layer above and adjacent said groove, said implanting being accomplished by use of an ion implantation voltage such that said impurity remains in said first semiconductor layer within said groove alone and passes through said first semiconductor layer above and adjacent said groove;   (e) heating said first semiconductor layer;   (f) selectively removing the first semiconductor layer above and adjacent said groove by utilizing said difference in impurity concentration;   (g) depositing a second semiconductor layer over said first semiconductor layer in said groove and on the substrate surface adjacent said groove, said second semiconductor layer being deposited to a depth greater than the depth of said groove so that at the location of said groove said second semiconductor layer fills said groove and extends above the main surface of said substrate;   (h) introducing said impurity from said first semiconductor layer into said second semiconductor layer whereby the impurity concentration of said second semiconductor layer within the groove is substantially different from the impurity concentration of said second semiconductor layer above and adjacent said groove; and   (i) selectively removing said second semiconductor layer above and adjacent said groove by utilizing the difference in impurity concentration so as to allow the second semiconductor layer to remain only within the groove and, thus, to provide a region for separating two adjacent island regions.   
     
     
       2. A method of manufacturing a semiconductor circuit comprising the steps in the order mentioned below of: (a) forming a plurality of deposition layers on the surface of a semiconductor substrate with said deposition layers including an uppermost layer doped with a high concentration of an impurity;   (b) forming a groove on one main surface of said semiconductor substrate such that an island region is defined by said groove and such that said deposition layers are removed in the area of said groove;   (c) oxidizing the surface of said groove to form an oxide film in said groove;   (d) depositing a semiconductor layer over said oxide film in said groove and over said deposition layers on the substrate surface adjacent said groove, said semiconductor layer being deposited to a depth greater than the depth of said groove so that at the location of said groove said semiconductor layer fills said groove above the main surface of said substrate;   (e) introducing said impurity from said uppermost layer into said semiconductor layer whereby the impurity concentration of said semiconductor layer within said groove is substantially different from the impurity concentration of said semiconductor layer above and adjacent said groove; and   (f) selectively removing the semiconductor layer above and adjacent said groove by utilizing the difference in impurity concentration so as to allow the semiconductor layer to remain only within said groove and, thus, to provide a region for separating two adjacent island regions.   
     
     
       3. The method according to claim 1 or 2 wherein said groove is of a V-shape in cross-section. 
     
     
       4. The method according to claim 3 wherein an epitaxial layer is formed on said semiconductor substrate before step (a) and said V-shaped groove extends through said epitaxial layer to reach said substrate. 
     
     
       5. The method according to claim 1 wherein said impurity is P-type. 
     
     
       6. The method according to claim 1 wherein said impurity is boron. 
     
     
       7. The method according to claim 2 wherein said uppermost layer is doped with a high concentration of N-type impurity. 
     
     
       8. The method according to claim 2 wherein said step of introducing said impurity includes the additional step of diffusing an N-type impurity from above said semiconductor layer into said semiconductor layer. 
     
     
       9. The method according to claim 4 wherein an region equal in conductivity type to and high in impurity concentration than said semiconductor substrate is formed in said substrate and the bottom region of said V-shaped groove extends through said epitaxial layer and is positioned in said high impurity region area. 
     
     
       10. The method according to claim 9 wherein said impurity is boron. 
     
     
       11. The method according to claim 8 wherein an epitaxial layer is formed on said semiconductor substrate before said step of forming the deposition layers and said groove is formed in step (a) to extend through said epitaxial layer. 
     
     
       12. The method according to claim 11 wherein a region equal in conductivity type to and higher in impurity concentration than said semiconductor substrate is formed in said substrate and the bottom region of said groove extends through said epitaxial layer and is positioned in said high impurity region. 
     
     
       13. The method according to claim 1, 2, 7, 11 or 12 wherein at least one PN junction is formed in said island region defined by said groove. 
     
     
       14. The method according to claim 13 wherein at least one end of said PN junction is in direct contact with said groove. 
     
     
       15. The method according to claim 2, 7 or 8 wherein said uppermost deposition layer is selected from the group consisting of a silicon dioxide film, a polysilicon film, and an amophorous silicon film each containing phosphorus or arsenic. 
     
     
       16. The method according to claim 8 wherein said impurity diffused from above said semiconductor layer is selected from the group consisting of phosphorus and arsenic. 
     
     
       17. The method according to claim 8 wherein said step surface of said semiconductor substrate and depositing a silicon dioxide film doped with a high concentration of phosphorus or arsenic on said silicon nitride film; step (b) includes selectively removing the silicon dioxide film, the silicon nitride film, and the upper surface region of said substrate so as to form said groove; said semiconductor layer deposited in step (d) to fill said groove comprises polysilicon; said N-type impurity diffused from above said semiconductor layer is phosphorus; and step (f) includes removing the remaining silicon dioxide film, oxidizing the surface region of said semiconductor layer within said groove, and removing the remaining silicon nitride film. 
     
     
       18. The method according to claim 11 wherein said semiconductor substrate is a P-type silicon substrate; said epitaxial layer formed on said substrate is of N-type conductivity; said semiconductor layer filling said groove comprises polysilicon; said impurity diffused from above said semiconductor layer is phosphorus; and the surface region of said semiconductor layer filling said groove is oxidized.