Switched-capacitor circuit analog-to-digital converter

Abstract

A switched-capacitor analog-to-digital converter implements a conversion scheme involving execution of an algorithmic technique of successive-approximation comprising a number of iterations dependent upon the conversion resolution desired. The algorithm used requires analog processing to produce an output voltage that is two times the output voltage resolved to realize the previous bit. The "times two" function is realized by adding the voltage of the last iteration to itself (i.e., V+V=2V). This is accomplished by storing the output voltage resolved into the previous bit and separately storing a voltage corresponding to that voltage. Both stored voltages are then transferred to an integrator circuit which adds the two voltages and produces the output voltage to be resolved into the next bit.

What is claimed is: 
     
       1. An amplifier circuit having input offset voltage compensation, comprising: an operational amplifier having an input and an output, the input being at an offset voltage level with respect to virtual ground;   first and second capacitors connected to the amplifier input;   first means for applying an input voltage signal level to the first capacitor to establish a voltage thereon equal to the input voltage minus the amplifier offset voltage, and for establishing the offset voltage level on the second capacitor;   second means for causing the voltage on the first capacitor to be transferred to the second capacitor, so as to be added to the offset voltage established thereon; and   third means for causing the voltage on the second capacitor to be transferred back to the first capacitor,   whereby the operational amplifier produces an output voltage level functionally related to the input voltage signal level and independent of the amplifier input offset voltage.   
     
     
       2. The amplifier circuit of claim 1 wherein: the first and second capacitors are of substantially equal capacitance values.   
     
     
       3. The amplifier circuit of claim 1 or 2 further comprising: means for establishing a feedback loop between the operational amplifier input and output, to configure the operational amplifier as a buffer amplifier.   
     
     
       4. The amplifier circuit of claim 1 or 2 wherein: said first means comprises a first switch device connected between the first capacitor and an input voltage source, and a second switch device connected between the second capacitor and ground potential;   said second means comprises a third switch device connected between the first capacitor and ground, and a fourth switch device connected between the second capacitor and the amplifier output; and   said third means comprises a fifth switch device connected between the first capacitor and the amplifier output, and a sixth switch device connected between the second capacitor and ground potential.   
     
     
       5. Apparatus for developing a voltage output level that is two times a previously existing output voltage level, comprising: an integrator circuit having an input and an output, for producing an output voltage level;   first means connectable to the integrator circuit input, for receiving and storing a voltage corresponding to a previously existing output voltage level;   second means for accessing the integrator circuit output to obtain the output voltage level, and for storing the same as a previously existing voltage level;   third means for causing the voltage stored in said first means to be transferred to the integrator circuit; and   fourth means for causing the voltage in said second means to be transferred to the integrator circuit and be added to the voltage transferred from said first means.   
     
     
       6. The circuit of claim 5 wherein the voltage accessing and storing means comprises: a sample-and-hold circuit having an input and an output; and   a switch for connecting the sample-and-hold circuit input to the amplifier output.   
     
     
       7. The circuit of claim 6 wherein the means for causing the transfer of the voltage in the sample-and-hold circuit comprises a switch for connecting the sample-and-hold circuit output to the integrating capacitor. 
     
     
       8. A switched-capacitor circuit for developing an output voltage level that is two times a previously existing output voltage level, comprising: an operational amplifier having an input and an output;   an integrating capacitor connectable in a feedback loop between the amplifier input and output;   a storage capacitor connected to the integrating capacitor, for storing a voltage corresponding to a previously existing amplifier output voltage level;   means for accessing the amplifier output and storing the output voltage level as a previously existing amplifier output voltage level;   means for causing the voltage on the storage capacitor to be transferred to the integrating capacitor; and   means for causing the voltage in the voltage storing means to be transferred to the integrating capacitor and be added to voltage transferred from the storage capacitor.   
     
     
       9. The circuit of claim 6 wherein the integrating capacitor and the storage capacitor are of equal capacitance values. 
     
     
       10. The circuit of claim 6 wherein the means for causing transfer of the storage capacitor voltage to the integrating capacitor comprises: a switch connecting the integrating capacitor in the amplifier feedback loop; and   a switch for connecting the storage capacitor to ground potential.   
     
     
       11. A switched-capacitor circuit for developing an output voltage level that is two times a previously existing output voltage level, comprising: an operational amplifier having an input and an output, said amplifier producing an output voltage level;   a first capacitor connected to the amplifier input;   a second capacitor connected to the amplifier input, for storing a voltage corresponding to a previously existing amplifier output voltage level;   means for storing a voltage level applied thereto;   a first switch for connecting the first capacitor in a feedback loop between the amplifier input and output;   a second switch for connecting the second capacitor to ground potential;   a third switch for connecting the voltage level storing means to the amplifier output to obtain and store the amplifier output voltage level as a previously existing voltage level;   a fourth switch for connecting the voltage level storing means to the first capacitor; and   means for controlling said switches to (i) cause the voltage stored on the second capacitor to be transferred to the first capacitor,   (ii) cause the voltage stored in the voltage level storing means to be transferred to the first capacitor and be added to the voltage transferred from the second capacitor, and   (iii) cause the amplifier to produce on output voltage corresponding to the voltage on the first capacitor.     
     
     
       12. The circuit of claim 11 wherein the first and second capacitors are of equal capacitance values. 
     
     
       13. A switched-capacitor analog-to-digital converter, comprising: an operational amplifier integrator circuit having an input and an output, and including first and second capacitors connected to the amplifier input;   said integrator circuit producing an output voltage level corresponding to the voltage on the first capacitor;   means connectable to the integrator circuit output for resolving the integrator circuit output voltage level into a binary digit value, and providing an output signal indicative thereof;   means connectable to the integrator circuit output for accessing and storing the resolved output voltage level;   means for connecting the second capacitor in a feedback loop between the amplifier input and output, and for connecting the first capacitor between the amplifier input and ground, to cause the voltage on the first capacitor to be transferred to the second capacitor and stored thereon;   means for connecting the first capacitor in a feedback loop between the amplifier input and output, and for connecting the second capacitor between the amplifier input and ground, to cause the voltage stored on the second capacitor to be transferred back to the first capacitor;   means for connecting the output voltage level storing means to the integrator circuit, for causing the voltage stored therein to be transferred to the first capacitor and be added to the voltage transferred from the second capacitor; and   means connected to the integrator circuit, for causing a reference voltage level, selectively of either polarity based upon the binary digit value produced by said resolving means, to be placed on the first capacitor along with voltages transferred from the second capacitor and the output voltage storing means.   
     
     
       14. The apparatus of claim 13 wherein said resolving means comprises a comparator circuit for determining whether or not the output voltage level is positive or negative. 
     
     
       15. The apparatus of claim 13 wherein the storing means comprises a sample-and-hold circuit. 
     
     
       16. The apparatus of claim 13 wherein the first and second capacitors are of equal capacitance values. 
     
     
       17. The apparatus of claim 13 wherein the means for placing a reference voltage on the first capacitor comprises: a first switch coupled to a reference voltage source;   a second switch coupled to ground potential;   said switches being connected to a common circuit node, for alternately connecting the node to the reference voltage source and ground;   a capacitor connected between the circuit node and the integrator circuit input; and   means responsive to the binary digit output, for closing the switches in a predetermined sequence to cause a positive or a negative reference voltage to be integrated onto the first capacitor.   
     
     
       18. A switched-capacitor analog-to-digital converter, comprising: an operational amplifier having an input and an output;   a first capacitor connected to the amplifier input;   a second capacitor connected to the amplifier input, the second capacitor being of equal capacitance value to the first capacitor;   a first switch connected to the first capacitor, for applying thereto an analog input voltage to be converted to a representative digital word;   a second switch for connecting the first capacitor in a feedback loop between the amplifier input and output;   a third switch for grounding the other lead of the first capacitor;   a fourth switch for connecting the second capacitor in a feedback loop between the amplifier input and output;   a fifth switch for grounding the other lead of the second capacitor;   a comparator connectable to the amplifier output, for processing the voltage level available at the amplifier output to determine the polarity, and for producing an output signal of a binary digit value indicative of the determination;   means connectable to the amplifier output, for accessing and storing the amplifier output voltage level received by the comparator;   a sixth switch for connecting the voltage storing means to the first capacitor;   means connected to the amplifier input for causing a reference voltage level selectively of either polarity based upon the result of the comparator determination to be integrated on the first capacitor; and   means for actuating said switches in a predetermined sequence to cause (a) an amplifier output voltage level corresponding to the voltage on the first capacitor to be processed by the comparator and stored by the storing means,   (b) the voltage on the first capacitor to be transferred to the second capacitor and stored thereon,   (c) the voltage stored by the storing means to be transferred to the first capacitor,   (d) the voltage stored on the second capacitor to be transferred back to the first capacitor and added to the voltage from the storing means, and   (e) a reference voltage to be integrated on the first capacitor.     
     
     
       19. The apparatus of claim 18 wherein said switch actuating means causes the sequence of switch actuations to be repeated N-1 times after an analog input voltage is applied to the first capacitor, where N is the number of binary digits in a digital word into which the analog input voltage is converted. 
     
     
       20. The apparatus of claim 13 or 18 wherein said voltage storing means comprises: a second operational amplifier having an input and an output;   third and fourth capacitors of equal capacitance values connected to the amplifier input and individually connectable in a feedback loop between the second amplifier input and output;   a switch connecting the output of the first operational amplifier to the third capacitor, for applying the output voltage level thereto;   means for causing the voltage on the third capacitor to be transferred to the fourth capacitor; and   means for causing the voltage stored on the fourth capacitor to be transferred back to the third capacitor and made available at the output of the second amplifier.   
     
     
       21. A method of analog-to-digital conversion, comprising the steps of: (a) sampling an input analog voltage to be converted to a digital word of N binary digits;   (b) storing the voltage sample on a first capacitor;   (c) producing an output voltage corresponding to the voltage on the first capacitor;   (d) determining the polarity of the output voltage and producing a binary signal indicative thereof;   (e) storing the output voltage;   (f) transferring the voltage on the first capacitor to a second capacitor;   (g) transferring the stored output voltage to the first capacitor;   (h) transferring the voltage on the second capacitor back to the first capacitor for addition to the voltage thereon;   (i) causing a reference voltage of a polarity dependent upon the value of said binary signal to be integrated onto the first capacitor; and   (j) repeating steps (c) through (i) N-1 times.   
     
     
       22. A method of developing a voltage that is two times a previously existing voltage, comprising the steps of: establishing a voltage on a first capacitor;   producing an output voltage corresponding to the voltage on the first capacitor;   storing the output voltage;   transferring the voltage on the first capacitor to a second capacitor;   transferring the stored output voltage to the first capacitor; and   transferring the voltage on the second capacitor back to the first capacitor for addition to the voltage thereon.