Triplex digital magnetic recording and reproducing system

Abstract

A quaternary saturated digital magnetic recording system for enhancing information entropy provides an effective bit density increase of 100% or more over the MFM code. In the simplest implementation, groups of two input binary bits are mapped into one data cell, preferably into four combinations of long or short breaks and positive or negative polarity, with the break optionally centralized within the data cell for self-clocking. A system for reproducing the recorded information provides a peak detector, responsive to the recorded signal, coupled to pulse polarity and break width detector circuitry, with an internally synchronized clock, for remapping the recorded data into binary format.

I claim: 
     
       1. A magnetic recording system for recording information on a magnetic medium, comprising: means for generating a substantially continuous alternating signal,   means for applying said alternating signal to provide a multiplicity of magnetic flux reversals that substantially erases said magnetic medium,   means for providing an interruption of said alternating signal at a controlled polarity and position thereof,   said interruption comprising a break of predetermined duration corresponding to said controlled polarity embedded in said alternating signal,   means coupled to said alternating signal for controlling the duration of said break by selecting at least two of a plurality of predetermined durations, and   means for receiving and recording said interrupted alternating signal on said medium,   said controlled polarity being defined by the direction of said alternating signal at the time of initiating said interruption, and said alternating signal being resumed after said break in an opposing polarity defined by the direction of said alternating signal at the time of resumption, said time of initiating said interruption and said time of resumption bounding said break corresponding to one of said predetermined durations.   
     
     
       2. The system of claim 1 in which said means for generating an alternating signal includes pattern storage means for storing a multiplicity of alternating signal and break patterns in accordance with a predetermined polarity and break duration of said interruption, each of said signal and break patterns constitute a predetermined TRIPLEX data pattern. 
     
     
       3. The system as set forth in claim 2, in which said predetermined TRIPLEX data pattern comprises an alternating signal with a break interposed therein, said break having a predetermined position with respect to said alternating signal, a predetermined polarity, and a predetermined duration, corresponding to one of said binary data words. 
     
     
       4. The system as set forth in claim 3, further comprising means responsive to said interrupted alternating signal recorded on said medium for providing a read signal, said read signal comprised of a positive pulse followed by a negative pulse when reading a break of positive polarity and a negative pulse followed by a positive pulse when reading a break of negtive polarity, and a zero level signal when reading said alternating signal, said read signal having a substantially greater peak-to-peak amplitude when reading a wide break than the amplitude of said signal when reading a narrow break. 
     
     
       5. The system of claim 4, further comprising means for detecting amplitude with respect to a predetermined threshold and polarity of said positive and negative pulses of said read signal, means responsive to said detection means and also responsive to said positive and negative pulses for determining a zero-crossing point defining the transition between said positive and negative pulses and for providing zero-crossing pulses,   clock means responsive to said zero-crossing pulses for generating a read clock signal phase-locked thereto,   means responsive to said phase-locked clock for determining the center of a break, and providing a pulse signal corresponding thereto,   means responsive to said break pulse signal for providing a delayed clock pulse sychronized with said input binary bits,   means responsive to said phase-locked clock and said detector means for discriminating said wide breaks from said narrow breaks,   means responsive to said phase-locked clock and said detector means for determining the polarities of said detected positive and negative pulses of said read signal, thereby providing a break width signal and break polarity signal respectively, and   remapping means responsive to said break width signal, said break polarity signal, and said delayed clock pulse for recovering the binary data corresponding to said breaks and remapping said data into said input binary bit format.   
     
     
       6. The system of claim 2 further comprising: binary data storage means for receiving binary data words each including at least two input binary data bits, and   mapping means responsive to a group of a predetermined number of said binary bits for controlling the generation of each of said interruptions of said alternating signal, each interruption being of a polarity and of a break duration in accordance with said group of binary bits, said alternating signal and said interruptions constituting a train of encoded binary data,   said mapping means coupled to said binary data storage means and responsive to said binary data words for producing digital control signals each representative of one of a predetermined plurality of TRIPLEX data patterns.   
     
     
       7. The system of claim 1, wherin a first TRIPLEX data pattern is represented by a long break of positive polarity between said alternating signals, a second TRIPLEX data pattern is represented by a narrow break of positive polarity between said alternating signals, a third TRIPLEX data pattern is represented by a narrow break of negative polarity between said alternating signals, and a fourth TRIPLEX data pattern is represented by a wide break of negative polarity between said alternating signals. 
     
     
       8. The system of claim 6, in which said mapping means comprises means for mapping groups of two input binary bits into a single TRIPLEX cell, said cell comprising an alternating flux reversal signal interrupted by a break of predetermined duration centered within said cell. 
     
     
       9. The system as set forth in claim 6, further comprising TRIPLEX data pattern selection means coupled to receive control signals from said mapping means and alternating signal and break patterns from said pattern storage means for selecting at least one of said TRIPLEX data patterns for producing said train of encoded binary data. 
     
     
       10. The system as set forth in claim 9, further comprising means for storing said train of encoded binary data in parallel form and reading out said train as data pulses in serial form. 
     
     
       11. The system as set forth in claim 10, further comprising binary clock means for providing clock signals coupled to said binary data storage means. 
     
     
       12. The apparatus as set forth in claim 11, further comprising divider means responsive to said binary clock signals for providing a pulse representative of a portion of said clock signals for synchronizing said mapping means. 
     
     
       13. The system as set forth in claim 12, further comprising means coupled to said divider means for delaying said synchronization pulse by a predetermined time interval with respect to said binary clock signals, phase-lock oscillator clock means, and means for providing a delayed synchronization pulse to said phase-lock oscillator clock means and said pattern selection means. 
     
     
       14. The system as set forth in claim 13, in which said phase-lock oscillator clock means comprises means also responsive to said binary clock signals for supplying timing signals to said means for storing said train of binary data. 
     
     
       15. The system of claim 14, further comprising equalizing means coupled to receive said data pulses in serial form to enhance the readback characteristics thereof by shaping the waveform of said data pulses and providing said shaped pulses to said recording means. 
     
     
       16. Apparatus for recording information on a magnetic medium, comprising: means for receiving input binary bits,   binary data storage means for receiving binary data words each including at least two of said input binary data bits,   digital control means coupled to said binary data storage means and responsive to said data words for producing digital control signals each representative of one of a predetermined plurality of alternating flux reversal signal and break patterns,   pattern storage means for storing said plurality of alternating flux reversal signal and break patterns, comprising a first pattern represented by a long break of positive polarity between said alternating signals, a second pattern represented by a narrow break of positive polarity between said alternating signals, a third pattern represented by a narrow break of negative polarity between said alternating signals, and a fourth pattern represented by a wide break of negative polarity between said alternating signals, wherein each of said breaks is centrally disposed within said pattern,   pattern selection means coupled to receive control signals from said digital control means and alternating signal and break patterns from said pattern storage means for selecting at least one of said patterns for producing a train of encoded binary data comprising pulses of predetermined widths and polarities responsive to said alternating signal, said break width, and said polarity, including means for storing said train of binary data in parallel form and reading out said train as binary data in serial form,   means for receiving a pulse from binary clock means for synchronizing said binary data storage means, divider means, and phase-lock-oscillator clock means,   divider means responsive to said binary clock means for providing a pulse for synchronizing said digital control means and delay means thereto,   said delay means comprising means for delaying said divider synchronizing pulse by a predetermined time with respect to said binary clock means synchronization pulse, and for providing a delayed synchronization pulse to said clock and said pattern selection means, said phase-lock oscillator clock means responsive to said delay means and said binary clock means, for supplying timing signals to said means for storing binary data in parallel form and reading out said data in serial form, and   write amplifier means for driving a recording head and responsive to said serial data.   
     
     
       17. The apparatus as set forth in claim 16, further comprising apparatus for reading information recorded on said magnetic medium, including: reading means responsive to said information recorded on said medium for providing a read signal, said signal comprising a positive pulse followed by a negative pulse when reading a positive break and a negative pulse followed by a positive pulse when reading a negative break, and a zero level signal when reading said alternating signals, said read signal having a substantially greater peak-to-peak amplitude when reading a wide break than the amplitude of said signal when reading a narrow break,   means for detecting amplitude with respect to a predetermined threshold and polarity of said positive and negative pulses of said read signal,   means responsive to said detection means and also responsive to said positive and negative pulses for determining a zero-crossing point defining the transition between said positive and negative pulses and for providing zero-crossing pulses,   clock means responsive to said zero-crossing pulses for generating a clock signal phase-locked thereto,   means responsive to said phase-locked clock for determining the center of a break, and providing a pulse signal corresponding thereto,   means responsive to said break pulse signal for providing a delayed clock pulse synchronized with said input binary bits,   means responsive to said phase-locked clock and said detector means for discriminating said wide breaks from said narrow breaks,   means responsive to said phase-locked clock and said detector means for determining the polarities of said detected positive and negative pulses of said read signal, thereby providing a break width signal and break polarity signal respectively, and   remapping means responsive to said break width signal, said break polarity signal, and said delayed clock pulse for recovering the binary data corresponding to said breaks and remapping said data into said input binary bit format.