Digital control circuit

Abstract

The present invention relates to a digital control circuit which controls the drive of a load by the use of a clock pulse. More particularly, it relates to an integrated circuit device for combustion control which controls the combustion of a burner in a water heater, an air heater or the like. A combustion control circuit performs an ignition operation for a predetermined time, and stops the supply of fuel in case of misfire. When the reception of the time-keeping clock pulses has stopped within the predetermined time, such predetermined time will become infinite, and in the case of misfire, the fuel supply will continue dangerously. According to the present invention, a capacitor is charged by the output clock pulse of a circuit for shaping the waveform of the received clock pulse, an buffer circuit prevents the discharge of the capacitor toward the pulse shaping circuit when the clock pulse is at its low level, a discharge circuit for discharging the capacitor at this time is connected in parallel with the capacitor, and a voltage detecting circuit detects the voltage of the capacitor so that, when the capacitor voltage is unequal to a preset voltage, the combustion operation may be stopped by the output of the voltage detecting circuit. The constituents other than the capacitor are disposed within the integrated circuit device.

We claim: 
     
       1. A digital control circuit comprising means for providing a clock pulse signal of predetermined magnitude; control means responsive to said clock pulse signal and at least one control signal for generating a first signal for controlling a load; means including a capacitor connected to said clock pulse signal providing means through a charge resistor for causing said capacitor to be charged by said clock pulse signal to a voltage level determined by the magnitude of the pulses of said clock pulse signal; discharge means including a discharge resistor connected in parallel to said capacitor for holding the charge on said capacitor at said predetermined level when said capacitor is receiving said clock pulse signal of predetermined magnitude; voltage detecting means connected to said capacitor for detecting the voltage of said capacitor and including means for generating a second signal when the charged voltage of said capacitor is unequal to a preset voltage; and means connected to said voltage detection means for preventing generation of said first signal by said control means in response to receipt of said second signal. 
     
     
       2. A digital control circuit according to claim 1, wherein buffer means is connected between the output of said clock pulse signal providing means and said capacitor for preventing said capacitor from discharging toward the output of said clock pulse signal providing means. 
     
     
       3. A digital control circuit according to claim 2, wherein at least said voltage detecting means and said buffer means are formed as an integrated circuit. 
     
     
       4. A digital control circuit according to 2, wherein said discharge means comprises means for discharging said capacitor when the magnitude of said clock pulse signal falls below said predetermined magnitude. 
     
     
       5. A digital control circuit according to claim 2, wherein said buffer means comprises a diode. 
     
     
       6. A digital control circuit according to claim 2, wherein said buffer means comprises a transistor having a base electrode connected to the output of said clock pulse signal providing means and a collector connected to said capacitor. 
     
     
       7. A digital control circuit according to claim 2, wherein said means for providing said clock pulse signal comprises pulse shaping means connected to receive a pulse signal for shaping said pulse signal into a clock pulse signal of predetermined magnitude. 
     
     
       8. A digital control circuit according to claim 7, wherein said pulse shaping means, said control means and at least said buffer means and said voltage detecting means are formed as an integrated circuit having a first input terminal connected to said pulse shaping means and at which said pulse signal is received and a second input terminal via which said buffer means and said voltage detecting means are connected to said capacitor, which is provided outside said integrated circuit. 
     
     
       9. A digital control circuit according to claim 8, wherein said discharge means is formed as part of said integrated circuit and is connected to said second input terminal. 
     
     
       10. A digital control circuit according to claim 1, wherein said voltage detecting means includes first means for generating said second signal when the voltage level of said capacitor is lower than a first predetermined voltage and second means for generating said second signal when the voltage level of said capacitor is higher than a second predetermined voltage which is higher than said first predetermined voltage. 
     
     
       11. A digital control circuit comprising control means including a pulse counting circuit providing outputs at different times for controlling the performance of a sequence of operations of a load; a first voltage source connected to said control means as a power supply; a second voltage source connected to said control means for supplying a clock pulse signal of predetermined magnitude to said pulse counting circuit to control the operation thereof; means including a capacitor connected to said second voltage source for causing said capacitor to be charged by said clock pulse signal to a voltage level determined by the magnitude of the pulses of said clock pulse signal; voltage detecting means connected to said capacitor for detecting the voltage of said capacitor and for generating a control signal when the charged voltage of said capacitor is unequal to a preset voltage; and means connected to said voltage detection means for controlling said pulse counting circuit to prevent the performance of said sequence of operations of said load in response to receipt of said control signal. 
     
     
       12. A digital control circuit according to claim 11 wherein said control means includes means responsive to said control signal for inhibiting operation of said pulse counting circuit. 
     
     
       13. A digital control circuit according to claim 11, including discharge means including a discharge resistor connected in parallel to said capacitor for holding the charge on said capacitor at said predetermined level when said capacitor is receiving said clock signal of predetermined magnitude. 
     
     
       14. A digital control circuit according to claim 13, wherein said discharge means further comprises means for discharging said capacitor when the magnitude of said clock pulse signal falls below said predetermined magnitude. 
     
     
       15. A digital control circuit according to claim 11 wherein said control means is formed as an integrated circuit.