Automatic compensation circuit for use with analog multiplier

Abstract

An automatic compensation circuit for use with an analog multiplier is disclosed. At regular intervals at least one input to the analog multiplier is constrained to be zero for a short time. During this time a sample and hold circuit retains the pre-existing output voltage and a feedback circuit is activated which adjusts the output voltage of the multiplier to zero, thereby providing an accurate multiplied or product signal, typically representing power consumption, which is adjusted or compensated for the effects of any internal errors occurring within the analog multiplier.

I claim: 
     
       1. An automatic compensation circuit comprising an analog multiplier connected to receive a first signal representing instantaneous voltage and a second signal representing instantaneous current for generating a third current signal representing the product of said first and second signals,   means for converting said third current signal to a fourth voltage signal, and   compensation means connected to said converting means for adjusting the output of said converting means to zero during zero crossing points of at least one of said first or second signals.   
     
     
       2. In an electronic watt-hour meter, an automatic compensation circuit comprising an analog multiplier connected to receive a first signal representing instantaneous voltage and a second signal representing instantaneous current for generating a third current signal representing the product of said first and seconds signals,   means for converting said third signal to a fourth voltage signal,   compensation means connected to said converting means for adjusting the output of said converting means to zero during zero crossing points of at least one of said first or second signals, and   sample and hold means for storing the fourth voltage signal during the respective interval.   
     
     
       3. A circuit as in claim 2 including first switch means for normally connecting said first signal to said analog multiplier, second switch means for connecting a zero value to said analog multiplier during said zero crossings of said first or second signals, and control means for controlling said first and second switch means. 
     
     
       4. A circuit as in claim 3 including third switch means for normally connecting said fourth signal to said sample and hold means, fourth switch means for connecting said fourth signal through said compensation means to said connecting means during said zero crossing points of said first or second signals, and control means for controlling said third and fourth switch means.