US4652806AExpiredUtility

Micro-stepping translator controller

77
Assignee: AEROTECH INCPriority: Jan 23, 1986Filed: Jan 23, 1986Granted: Mar 24, 1987
Est. expiryJan 23, 2006(expired)· nominal 20-yr term from priority
H02P 8/22
77
PatentIndex Score
34
Cited by
15
References
5
Claims

Abstract

A micro-stepping translator controller for supplying current to a stepping motor having a plurality of windings comprises a power supply for supplying current to all windings and electronic switches for gating current to all windings. Logic means receive inputs comprising a clock input having a frequency being indicative of the micro-stepping rate and a multiplexing pulse. The logic means having digital circuits for outputting over a data bus signals indicative of two quadrants of a stepped periodic function. The signals correspond to different phases of the stepped periodic function during different multiplexing intervals. The logic means has digital circuits for sequentially outputting signals indicative of one of the four quadrants. A digital-to-analog converter is connected to the output data bus for producing an analog signal. Multiplexing and inverting means select and during some multiplexing intervals invert the output of the digital-to-analog converter in response to the multiplexing pulse and a signal indicative of quadrant, to produce at least two interleaved stepped periodic signals. An output circuit including said electronic switches, in response to said at least two interleaved stepped periodic signals, gate the electronic switches on and off during one-half of the cycle of one of said stepped periodic functions.

Claims

exact text as granted — not AI-modified
I claim: 
     
       1. A micro-stepping translator controller for supplying current in at least two phases of a stepped periodic waveform to a stepping motor having a plurality of windings comprising a power supply for supplying current to all windings,   electronic switches for gating current to all windings,   an oscillator for outputting a multiplexing pulse train,   logic means for receiving a clock pulse train input having a frequency being indicative of the micro-stepping rate and for receiving the multiplexing pulse train defining multiplexing intervals, said logic means having digital circuits for outputting over a data bus signals indicative of the function value for two one-quarter periods of a stepped periodic function, the period of said periodic function being divided into four one-quarter periods such that during the first one-quarter period the function value increases from zero to a positive maxim and during the second one-quarter period the function value decreases to zero, the value of the function changing stepwise with each clock input pulse, there being a fixed number of clock input pulses required for stepping through any one-quarter period, said signals on said data bus corresponding to different one-quarter periods of the stepped periodic function during different multiplexing intervals, said logic means having digital circuits for sequentially outputting a signal indicative of one of the four one-quarter periods, said signal changing value after the logic circuit has received clock pulses equal to the number of clock pulses required for stepping through one one-quarter period,   a digital-to-analog converter connected to the output data bus for producing an analog signal,   multiplexing and inverting means for selecting and during some multiplexing intervals inverting the output of the digital-to-analog converter in response to the multiplexing pulse train and said signal indicative of a one-quarter period, to produce at least two interleaved stepped periodic signals,   an output circuit including said electronic switches for, in response to said at least two interleaved stepped periodic signals, gating said electronic switches on and off, each switch being gated on and off during one-half of the period of one of said interleaved stepped periodic signals.   
     
     
       2. A micro-stepping translator controller for supplying current in at least two phases of a stepped periodic waveform to a stepping motor, said stepping motor having a plurality of windings each assigned to one of a plurality of phase groups, said phase groups arranged in pairs that are never to be simultaneously energized, there being at least two pairs of phase groups, comprising a power supply for supplying current to all windings,   electronic switches for gating current to all windings in each phase group,   an oscillator for outputting a multiplexing pulse train defining multiplexing intervals,   logic means for receiving a clock input having a frequency being indicative of the micro-stepping rate and for receiving the multiplexing pulse train, said logic means having digital circuits for outputting over a data bus signals indicative of two one-quarter periods of a stepped periodic function, the period of said periodic function being divided into four one-quarter periods such that during the first one-quarter period the function value increases from zero to a positive maxim and during the second one-quarter period the function value decreases to zero, the value of the function changing stepwise with each clock input pulse, there being a fixed number of clock input pulses required for stepping through any one-quarter period, said signals on said data bus corresponding to different one-quarter periods of the stepped periodic function during different multiplexing intervals, said logic means having digital circuits for sequentially outputting signals indicative of one of four one-quarter periods, said signal changing value after the logic circuit has received clock pulses equal to the number of clock pulses required for stepping through one one-quarter period,   a digital-to-analog converter connected to the output data bus for producing an analog signal,   multiplexing and inverting means for selecting and during some multiplexing intervals inverting the output of the digital-to-analog converter in response to the multiplexing pulse train and said signal indicative of a one-quarter period, to produce at least two interleaved stepped periodic signals, and   an output circuit including said electronic switches and a plurality of comparator means which are arranged to control pairs of phase groups in response to one of said stepped periodic signals, said comparator means for gating the switches on and off, each switch being gated on and off during one-half of the period of one of said interleaved stepped periodic signals.   
     
     
       3. A micro-stepping translator controller for supplying current in at least two phases of a stepped periodic waveform to a stepping motor, said stepping motor having a plurality of windings assigned to a phase group, said phase groups arranged in pairs that are never simultaneously energized, said phase groups being energized by stepped periodic unidirectional current signals having the same frequency but being out of phase, there being at least two pairs of phase groups, comprising a power supply for supplying current to all windings,   electronic switches for gating current to all windings in each phase group, each electronic switch having a control terminal,   current sensors associated with each electronic switch for producing a signal indicative of the current through said switch,   an oscillator for outputting a multiplexing pulse train defining multiplexing intervals,   logic means for receiving a clock input having a frequency being indicative of the micro-stepping rate and for receiving the multiplexing pulse train, said logic means having digital circuits for outputting over a data bus signals indicative of two one-quarter periods of a stepped periodic function, the period of said periodic function being divided into four one-quarter periods such that during the first one-quarter period the function value increases from zero to a positive maxim and during the second one-quarter period the function value decreases to zero, the value of the function changing stepwise with each clock input pulse, there being a fixed number of clock input pulses required for stepping through any one-quarter period, said signals on said data bus corresponding to different one-quarter periods of the stepped periodic function during different multiplexing intervals, said logic means having digital circuits for sequentially outputting signals indicative of one of four one-quarter periods, said signal changing value after the logic circuit has received clock pulses equal to the number of clock pulses required for stepping through one one-quarter period,   a digital-to-analog converter connected to the output data bus for producing an analog signal,   multiplexing and inverting means for selecting and during some multiplexing intervals inverting the output of the digital-to-analog converter in response to the multiplexing pulse train and said signal indicative of one-quarter period, to produce at least two interleaved stepped periodic signals,   an output circuit including said electronic switches for, in response to said stepped periodic signals, gating switches on and off during one-half of the period of one of said stepped interleaved periodic signals, said output circuit comprising a summing means associated with each signal phase and with one pair of switches for smoothing the multiplexed signal and combining with feedback signals from said current sensors associated with said associated switches to produce error signals for each pair of switches, a triangle wave oscillator, a plurality of comparators, one comparator of said plurality of comparators having an output connected to the control terminal of one of said switches, said comparators having inverting and noninverting inputs, means for connecting the outputs of each summing means to comparators associated with one pair of switches respectively and means for connecting the output of the triangle wave generator to all comparators, means for adjusting the D.C. level of the triangle wave oscillator before application to the comparators such that the switches are gated on and off during half periods of one said stepped periodic signals.   
     
     
       4. A micro-stepping translator controller according to claim 1, 2, or 3 further comprising gates between each comparator and each associated switch, a shutdown circuit that latches if the current in any switch exceeds a threshold indicative of a short circuit and generates a shutdown signal applying said shutdown signal to the gates to prevent the switches from conducting. 
     
     
       5. A micro-stepping translator controller according to claim 1, 2, or 3 further comprising means for adjusting the amplitude of the output of the analog-to-digital converter.

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