Regulated DC power supply

Abstract

A regulated power supply that provides two desired direct current voltages at respective outputs thereof, the supply maintaining the difference between voltages appearing at the outputs the same as the difference between the desired values, series regulators respectively coupled to each output that are in a saturation mode when a voltage that is a fraction of the voltage between the outputs lies within a given range, where one of the series regulators is placed in a linear mode when the voltage is at or beyond one edge of the range, and the other series regulators is placed in a linear mode when the voltage is at or beyond the other end of the range.

What is claimed is: 
     
       1. A DC power supply comprising: a transformer having a primary winding and first and second secondary windings,   means for exciting said primary winding with AC current,   means coupled to said first secondary winding for providing a first DC voltage,   means for regulating said first DC voltage,   means coupled to said second secondary winding for providing a second DC voltage,   means for regulating said second DC voltage,   means for deriving the difference between said first and second DC voltages, and   means responsive to said difference for controlling said means for exciting said primary winding so as to keep the difference at a predetermined value.   
     
     
       2. A DC power supply as set forth in claim 1 wherein: said means for regulating said first DC voltage includes a first transistor that regulates when in a linear mode,   said means for regulating said second DC voltage includes a second transistor that regulates when in a linear mode,   means are provided for deriving a voltage intermediate said first and second DC voltages,   means responsive to said intermediate voltage for causing said first and second transistors to be in a saturation mode when said intermediate voltage is within a given range, for causing said first transistor to be in a linear mode and said second transistor to be in a saturation mode when said intermediate voltage is on one side of said range, and for causing said first transistor to be in a saturation mode and said second transistor to be in a linear mode when said intermediate voltage is on the other side of said range.