Video signal processing circuitry

Abstract

A video signal processing circuitry having a comb filter to extract a vertical contour component of an input video signal by feeding back a signal, which is obtained by subtracting a nondelay signal from a one-line delay signal relative to the iput video signal, with a feedback coefficient K to an input signal of a one-line delay circuit or to both of such input signal and the nondelay signal anterior to the subtraction. The output signal of the comb filter is added with an addition coefficient A to the input video signal introduced to the comb filter or to the input signal of the one-line delay circuit, whereby an output video signal is produced while any noise component is effectively suppressed without deteriorating the distinction of the vertical contour portion. The addition coefficient A is so set as to have, with respect to the feedback coefficient K, a linear functional relationship of A=1/2+K/2, A=1/2-K/2 or A=K+1/2.

We claim: 
     
       1. A video signal processing circuit capable of improving a signal-to-noise ratio without deteriorating the sharpness of a vertical contour of a video signal, said circuit comprising: comb filter means having a delay circuit whose delay time corresponds to one line period of an input video signal, a subtraction circuit for subtracting the input video signal from the output signal of said delay circuit, and feedback means for feeding back the output signal of said subtraction circuit with a feedback coefficient K to the input signal of said delay circuit, said filter means functioning to extract the vertical contour component from the input video signal; and adding means for adding the output signal of said subtraction circuit with an addition coefficient A to the input video signal; wherein said addition coefficient A is so set as to have, with respect to said feedback coefficient K, a particular relationship represented by a linear function so that the response is dipped at a frequency (n+1/2)fH, in which n is an integer, and fH is a horizontal scanning repetition frequency. 
     
     
       2. The video signal processing circuit as defined in claim 1, wherein said feedback means feeds back the output signal of said subtraction circuit to the input signal of said delay circuit, and said adding means produces its output by adding the output signal of said subtraction circuit to the input video signal while the relationship between said addition coefficient A and feedback coefficient K is maintained as A=1/2+K/2. 
     
     
       3. The video signal processing circuit as defined in claim 2, wherein said adding means comprises first attenuation means fed with the output signal of said subtraction circuit and having an attenuation factor established to be equivalent to the feedback coefficient of said feedback means, addition means for adding the input and output signals of said first attenuation means, and second attenuation means for attenuating the output signal of said addition means to a half amplitude. 
     
     
       4. The video signal processing circuit as defined in claim 1, wherein said feedback means feeds back the output signal of said subtraction circuit to the input signal of said delay circuit, and said adding means produces its output by adding the output signal of said subtraction circuit to the input signal of said delay circuit while the relationship between said addition coefficient A and feedback coefficient K is maintained as A=1/2-K/2. 
     
     
       5. The video signal processing circuit as defined in claim 4, wherein said addition output means comprises first attenuation means fed with the output signal of said subtraction circuit and having an attenuation factor established to be equivalent to the feedback coefficient of said feedback means, subtraction means for subtracting the output signal of said first attenuation means from the input signal thereof, and second attenuation means for attenuating the output signal of said subtraction means to a half amplitude. 
     
     
       6. The video signal processing circuit as defined in claim 1, wherein said subtraction circuit subtracts the input signal of said delay circuit from the output signal thereof, said feedback means feeds back the output signal of said subtraction circuit to the input video signal of said delay circuit, and said adding means produces its output by adding the output signal of said subtraction circuit to the input video signal while the relationship between said addition coefficient A and feedback coefficient K is maintained as A=K+1/2. 
     
     
       7. The video signal processing circuit as defined in claim 6, wherein said adding means comprises first attenuation means fed with the output signal of said subtraction circuit and having an attenuation factor established to be equivalent to the feedback coefficient K of said feedback means, third attenuation means fed with the output signal of said subtraction circuit and functioning to attenuate the received signal to a half amplitude, and means for adding the respective output signals of said first and third attenuation means to each other. 
     
     
       8. The video signal processing circuit as defined in claim 2, wherein the relationship between said addition coefficient A and feedback coefficient K is maintained as A=1/2+K/2 when the amplitude of the signal inputted from said subtraction circuit is below a predetermined threshold level, and said adding means further includes selective switching means for changing said addition coefficient A from said relationship when said amplitude is in excess of said predetermined threshold level. 
     
     
       9. The video signal processing circuit as defined in claim 4, wherein the relationship between said addition coefficient A and feedback coefficient K is maintained as A=1/2-K/2 when the amplitude of the signal inputted from said subtraction circuit is below a predetermined threshold level, and said adding means further includes selective switching means for changing said addition coefficient A from said relationship when said amplitude is in excess of said predetermined threshold level. 
     
     
       10. The video signal processing circuit as defined in claim 6, wherein the relationship between said addition coefficient A and feedback coefficient K is maintained as A=K+1/2 when the amplitude of the signal inputted from said subtraction circuit is below a predetermined threshold level, and said adding means further includes selective switching means for changing said addition coefficient A from said relationship when said amplitude is in excess of said predetermined threshold level.