Memory mapping system

Abstract

The disclosure relates to a memory mapping system wherein information is stored on a page by page basis in memory in discontiguous locations therein with the address of the next page in which storage is to take place always being available in the controller to minimize delay in storage from the end of one page to the beginning of the following page, regardless of page location in memory. When a user makes a request for storage space in memory, the amount of memory required is determined and the host looks to see where it can obtain that memory. Typically, use of discontiguous memory locations is required. All of the information relative to the addresses of the discontiguous storage locations in memory is provided to the controller by the host computer in a single command rather than after each move to a discontiguous storage location. All jumps to discontiguous storage locations are then performed independent of the host computer.

What is claimed is: 
     
       1. A system for transferring a block of information into a first memory, said system comprising: (i) a second memory;   (ii) a host computer, operatively connected to said first memory, having (a) means, operatively connected to said first memory, for identifying regions of said first memory which are available for storing at least part of said block of information,   (b) means, connected to said identifying means, for selecting, from said regios identified by said identifying means, a set of regions to receive said block of information, and   (c) means, connected to said selecting means, for creating a list of the initial address of each region in said set of regions;     (iii) a controller, operatively connected to said first memory, said second memory and said host computer, said controller having (a) means for receiving said list from said host computer;   (b) means, connected to said receiving means, for storing said list in said second memory;   (c) means for retrieving individual initial addresses from said list stored in said second memory;   (d) means, responsive to the output of said address retrieval means, for providing the addresses in said first memory at which said information is to be stored;   (e) means, responsive to the output of said address providing means, for transferring the information into said first memory;   (f) means, connected to said means for providing the addresses and operative during the transferring of the information into said first memory, for identifying when the region of said first memory into which the information is being stored is full; and   (g) means, responsive to the output of said full region identifying means, for causing said address retrieval means to retrieve the address of another region from said list in said second memory.     
     
     
       2. The system of claim 1, wherein the address providing means comprises; counter means; and   clock signal means, connected to the clocking input of said counter means, for incrementing the outputs of said counter means during the transferring of said block of information.   
     
     
       3. The system of claim 2 wherein the counter means comprises: a first counter portion for providing the initial address of the region in which the information transfer is occurring,   a second counter portion for providing the address within the region into which the information is being transferred, and   means for providing said clocking input to said first counter portion only at such times as a new region address is being provided to said counter means from said second memory.   
     
     
       4. The system of claim 2 wherein said full region identifying means comprises: means, connected to the output of said counter means, for detecting the presence at the output of a predetermined count indicating that the region is full, and   means, operatively connected to said count detecting means, for generating an output signal to said causing means for when said predetermined count is detected by said count detecting means.   
     
     
       5. A method of storing a block of information in a first memory, said first memory having a plurality of storage regions available for storing at least part of the block of information and a plurality of storage regions unavailable for storing any part of the block of information, said method comprising the steps of: (a) determining the amount of memory storage area in said first memory required to contain said block of information;   (b) selecting a set of regions from said plurality of regions available for storing at least part of the block of information, the combined memory storage area of the selected set of regions being at least as large as the memory storage area required to store said block of information;   (c) storing, in a second memory means, a list of the initial addresses of said selected set of regions;   (d) retrieving, from said second memory means, the first entry on said list;   (e) initiating storage of said block of information in said first memory means, beginning at the retrieved address;   (f) monitoring the available storage area in the region into which said block of information is being transferred;   (g) if the region into which said block of information is being transferred becomes full prior to completion of the storage of the block of information, (1) retrieving the next entry from said list, and   (2) continuing the storage of said information, beginning at the address identified by said retrieved next entry; and     (h) repeating step (f) and (g) until the storage of the entire block of information has been completed.   
     
     
       6. A method of storing a block of information in a first memory, said first memory having a plurality of regions available for storing at least part of the block of information and a plurality of storage regions unavailable for storing any part of the block of information, said method comprising the steps of: (a) determining the amount of memory storage area required to contain said block of information;   (b) selecting a set of regions from said plurality of regions available for storing at least part of the block of information, the combined memory storage area of the selected set of regions being at least as large as the memory storage area required to store said block of information;   (c) storing, in a second memory means, a list of the initial addresses in said first memory means of said selected set of regions;   (d) storing, in said second memory means, a list of starting point addresses, each starting point address in said starting point list being associated with one of the regions in said selected set of regions and indicating an address within said associated region;   (e) retrieving, from said second memory means, the first entry on said list of addresses of said selected set of regions   (f) retrieving, from said second memory means, the entry from said list of starting point addresses associated with the entry retrieved in step (e);   (g) initiating storage of said block of information in said first memory means, beginning at at the address indicated by the entries retrieved in step (e) and (f);   (h) monitoring the available storage area in the region into which said block of information is being transferred;   (i) if the region into which said block of information is being transferred becomes full prior to completion of the storage of the block, (1) retrieving the next entry from said list of addresses of selected regions,   (2) retrieving the associated entry from said list of starting point addresses, and   (3) continuing the storage operation, beginning at the address identified by the entries retrieved in steps (i) (1) and (i) (2), and     (j) repeating step (h) and (i) until the storage of the block of information has been completed.