Apparatus for prefetching instructions

Abstract

An information processing system having a high speed buffer storage and employing an advanced control includes an address stack for storing addresses to be sent to a main storage as readout requests when instruction words or data are not contained in the high speed buffer storage, together with instruction stream numbers and flags for indicating whether the readout requests are conditional requests based on predicted prefetching. For the addresses having the conditional request flags, they are sent as the readout requests when the prediction is finally determined and the other addresses are cancelled. In this manner, the advanced control need not be interrupted.

What is claimed is: 
     
       1. An information processing system employing advanced control techniques comprising: an instruction control and arithmetic unit for preparing data addresses for data and/or instructions related to instruction streams following after a conditional branch instruction in advance of the result of testing for the condition of the conditional branch instruction, said instruction control and arithmetic unit having a plurality of instruction buffers, said instruction buffers holding instructions, said instruction control and arithmetic unit processing an instruction read from one of said instruction buffers corresponding to a specified stream number, supplying a read address of data and/or an instruction accompanying a processing of an instruction, and outputting a result of testing for a condition of a conditional branch instruction; a main storage for storing data and/or instructions;   a high speed buffer storage coupled to said main storage having a data part for storing the data and/or instructions read from the main storage, and   an address part for storing addresses of each of the stored data and/or instructions in said data part;     detecting means coupled to said high speed buffer storage and to said instruction control and arithmetic unit, said detecting means detecting whether a read address of each data and/or instruction related to the instruction streams corresponds or does not correspond to one of said addresses in said address part and for outputting a correspondence or noncorrespondence output of the detection between said addresses;   data read means coupled to said high-speed buffer storage and to said detecting means, said data read means being responsive to a correspondence output from said detecting means for reading each stored data and/or instruction therefrom;   address holding means coupled to said instruction control and arithmetic unit and to said detecting means, said address holding means being responsive to the non-correspondence output from said detecting means for storing said read address, a stream number and an identification indicating whether said read address relates to an instruction after the conditional branch instruction;   stream selection means coupled to said instruction control and arithmetic unit and to said address holding means, said stream selection means being responsive to the result of a testing of the condition of the conditional branch instruction for selecting an instruction stream to be processed, and   address sending means coupled to said stream selection means, said address holding means, and to said main storage, said address sending means sending said read address to said main storage if said identification held in said address holding means indicates no relation to a conditional branch instruction and said address sending means sending addresses identified by both a specified stream number and an identification from said address holding means to said main storage to read each stored data and/or instruction therefrom if said identification held in said address holding means indicates relation to a conditional branch instruction.   
     
     
       2. An information processing system employing advanced control techniques comprising; and instruction control and arithmetic unit for preparing data addresses for data and/or instructions related to instruction streams following after a conditional branch instruction which are prepared in advance of a result of testing for the condition of the conditional branch instruction; a main storage for storing the data and/or instructions;   a storage control unit coupled to said main storage having a high speed buffer storage, said high speed buffer storage having   a data part for storing the data and/or instructions read from the main storage, and   an address part for storing addresses of each of the stored data and/or instructions in said data part;   said instruction control and arithmetic unit having a plurality of instruction buffers, said instruction buffers holding instructions, said instruction control and arithmetic unit having processing means for processing an instruction read from one of said instruction buffers corresponding to a specified stream number and for supplying to said storage control unit a read address of a data and/or instruction accompanying a processing of an instruction and outputting a result of testing for a condition of a conditional branch instruction;   said instruction control and arithmetic unit having stream control means responsive to said branch instruction for outputting both an identification whether said read address is related to an instruction following after said conditional instruction and said specified stream number and for outputting a stream number of an instruction stream to be processed in response to said result of testing for a condition of a conditional branch instruction;   said storage control unit further including detecting means coupled to said instruction control and arithmetic unit and said high speed buffer storage for detecting whether said read address corresponds to one of said addresses of said address part or not so as to output a correspondence output or noncorrespondence output;   said storage control unit further including data read means coupled to said detecing means, said high speed buffer storage and said instruction buffers responding to said correspondence output for reading data and/or instruction from said high speed buffer storage to one of said instruction buffers;   said storage control unit further including address holding means coupled to said detecting means and said stream control means and responsive to said noncorrespondence output for storing said read address and said stream number and said identification from said stream control means; and   said storage control unit further including address sending means coupled to said stream control means and said address holding means, said address sending means sending said read address to said main storage if said identification held in said address holding means indicates no relation to a conditional branch instruction, said address sending means sending said read address related to said stream number outputted from said stream control means in response to said result of testing if said identification held in said address holding means indicates a relation to a conditional branch instruction to said main storage for reading.   
     
     
       3. An information processing system according to claim 1 wherein said address sending means includes means for cancelling addresses related to an instruction stream that is not to be processed among said addresses identified by both said specified stream number and said identification. 
     
     
       4. An information processing system according to claim 1 wherein said identification is a flag annexed to said read addresses stored in said address holding means. 
     
     
       5. An information processing system according to claim 2, said address sending means further including means for cancelling addresses related to stream numbers not to be processed except stream numbers outputted in response to said result of resting for a condition of a conditional branch instruction. 
     
     
       6. An information processing system according to claim 2, wherein said identification is a flag annexed to said read addresses stored in said address holding means.