US4751193AExpiredUtility

Method of making SOI recrystallized layers by short spatially uniform light pulses

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Assignee: Q DOT INCPriority: Oct 9, 1986Filed: Oct 9, 1986Granted: Jun 14, 1988
Est. expiryOct 9, 2006(expired)· nominal 20-yr term from priority
Inventors:James J. Myrick
H10W 10/181H10P 90/1912H10P 14/3808H10P 14/3802H10P 14/3411H10P 14/3238H10P 14/2905H10W 20/40H10P 14/2922G02B 6/122Y10S148/077Y10S148/093Y10S148/004
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PatentIndex Score
58
Cited by
17
References
2
Claims

Abstract

Method is provided for manufacturing large crystalline and monocrystalline semiconductor-on-insulator devices.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method for manufacturing a large crystalline or monocrystalline semiconductor-on-insulator device comprising the steps of providing an amorphous or polycrystalline semiconductor layer at least partially on an insulating substrate,   depositing a dielectric layer atop the semiconductor layer,   applying an intense pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to said semiconductor layer through said dielectric layer sufficient to melt at least a major portion of said layer,   crystallizing the melted semiconductor layer to provide a crystallized layer having a larger crystal structure than said amorphous or polycrystalline semiconductor layer prior to melting thereof,   applying a second intense patterned pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to remelt all but selected portions of said crystallized layer to provide remelted portions of said layer adjacent unmelted portions of said layer, and   recrystallizing said remelted portions in a monocrystalline manner from said unmelted portions adjacent thereto to provide a semiconductor-on-insulator device having large crystalline or monocrystalline zones in said semiconductor layer.   
     
     
       2. A method for manufacturing a large crystalline or monocrystalline semiconductor-on-insulator wafer, comprising the steps of providing a monocrystalline semiconductor substrate wafer,   providing a first dielectric layer on at least one major surface of said wafer,   etching a plurality of window zones through said dielectric layer to said semiconductor substrate wafer,   applying a polycrystalline or amorphous semiconductor layer atop said dielectric layer in contact with said semiconductor substrate at said window zones,   applying a second dielectric layer atop said semiconductor layer,   heating said wafer and said deposited layers to an elevated temperature below the melting point of the semiconductor wafer substrate,   applying an intense pulse of light having a duration of from about 1 nanosecond to about 10 milliseconds to said amorphous or polycrystalline semiconductor layer which is spatially uniform across said wafer sufficient to substantially instantaneously melt the semiconductor layer together with a small portion of the semiconductor substrate at the window zones,   preferentially conducting heat from the melted semiconductor layer at the window zones to rapidly reduce the temperature of the molten semiconductor layer to a crystallization temperature,   crystallizing the melted layer in a monocrystalline manner from the window zones across the top of the wafer over the first dielectric layer to provide a thin monocrystalline semiconductor layer in zones over the first dielectric layer between the window zones, and   removing the second dielectric layer to provide a substantially monocrystalline semiconductor-on-insulator structure and fabricating semiconductor integrated circuit devices in the thin monocrystalline layer intermediate the window zones.

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