Noise Reducing circuit of a video signal

Abstract

A noise reduction circuit for a video signal recording and/or reproducing apparatus comprises a high pass filter for extracting high frequency signal component form the input luminance signal, a limiter circuit for limiting the high frequency signal component, a multiplier for determining the degree of preemphasis and/or deemphasis by multiplying the limited signal, and summing and subtracting circuits respectively for adding and subtracting the high frequency signal component processed by the limiter circuit and the multiplier to and from the original luminance signal. The limiter circuit has an amplitude characteristic which changes a gradient so as to have a characteristic curve of at least three different gradient slopes interconnected in succession with an increase in amplitude of the signal supplied thereto.

What is claimed is: 
     
       1. A noise reduction circuit for use in a video signal recording and/or reproducing apparatus comprising: an input terminal to which an input video signal is applied;   high pass filter means for extracting a high frequency signal component according to a predetermined frequency characteristic from the input video signal applied to the input terminal;   first amplitude modifying means supplied with the high frequency signal component from the high pass filter means as an input signal for producing a first processed signal having a modified amplitude in accordance with a predetermined amplitude characteristic curve which changes a gradient thereof forming at least three slopes of different gradient with an increase in amplitude of the input signal supplied thereto, said amplitude characteristic curve having a first predetermined slope of said three slopes for an input signal supplied thereto having a small amplitude which is smaller than a first predetermined level, said amplitude characteristic curve having a second predetermined slope of said three slopes being less steep as compared with the first predetermined slope for an input signal supplied thereto having an intermediate level which is larger than the first predetermined level but smaller than a second predetermined level, said amplitude characteristic curve having a third predetermined slope of said three slopes which is substantially flat for an input signal supplied thereto having a large level which is larger than the second level;   amplifying means supplied with the first processed signal from the first amplitude modifying means for modifying the amplitude of the processed signal supplied thereto by a predetermined coefficient to produce a second processed signal;   first summing means supplied with the second processed signal from the amplifying means and the input video signal for adding the second processed signal to the input video signal to produce a preemphasis signal; and   first subtracting means supplied with the second processed signal from the amplifying means and the input video signal for subtracting the second processed signal from the input video signal to produce a deemphasis signal.   
     
     
       2. A noise reduction circuit as claimed in claim 1 in which said first amplitude modifying means comprises at least a pair of limiter circuits having respective limiting levels for producing output signals having amplitudes limited at the respective limiting levels and a summing circuit summing the output signals from the respective limiter circuits. 
     
     
       3. A noise reduction circuit as claimed in claim 1 in which said first amplitude modifying means comprises at least a pair of limiters having respective amplitude characteristic curves, and said amplitude characteristic curve of the first amplitude modifying means is produced as a sum of respective amplitude characteristic curves of the limiters. 
     
     
       4. A noise reduction circuit as claimed in claim 2 in which said summing circuit is a differential amplifier. 
     
     
       5. A noise reduction circuit as claimed in claim 1 further comprising a low pass filter means having a frequency characteristic which cuts off the frequency component substantially higher than 3 MHz from an input signal applied thereto according to a predetermined characteristic curve connected at an output port of said amplifying means, said second processed signal, being passed through the low pass filter means before it is supplied to the first subtracting means, and said second processed signal being passed through the low pass filter means before it is supplied to the first summing means. 
     
     
       6. A noise reduction circuit as claimed in claim 1 further comprising a feedback loop for feeding back the first processed signal from the first amplitude modifying means to an input port of the high pass filter means, said feedback loop comprising a multiplier for modifying the amplitude of the first processed signal by a predetermined coefficient to produce a feedback signal and a second summing means for adding the feedback signal with the input video signal from the input terminal to produce a second input video signal to be supplied to the high pass filter means. 
     
     
       7. A noise reduction circuit as claimed in claim 6 in which said first subtraction means is provided in a signal path extending from the input terminal to the input port of the high pass filter means at a side closer to the input terminal relative to the second summing means so as to receive the input video signal from the input terminal at an input port of the first subtraction means for a subtraction, the second processed signal is supplied to another input port of the first subtraction means for the subtraction through another feedback loop including a switch which is turned on and turned off respectively during the reproduction mode and the recording mode of the video signal recording and/or reproducing apparatus, and the output deemphasis signal produced by the first subtracting means is supplied to the second summing means and at the same time branched to an output terminal. 
     
     
       8. A noise reduction circuit as claimed in claim 1 further comprising a feedback loop for feeding back the first processed signal from the first amplitude modifying means to an input port of the high pass filter means, said feedback loop comprising a multiplier for modifying the amplitude of the first processed signal by a predetermined coefficient to produce a feedback signal and a second subtracting means for subtracting the feedback signal from the input video signal from the input terminal to produce a second input video signal to be supplied to the high pass filter means. 
     
     
       9. A noise reduction circuit as claimed in claim 8 in which said first summing means is provided in a signal path extending from the input terminal to the input port of the high pass filter means at a side closer to the input terminal relative to the second subtracting means so as to receive the input video signal from the input terminal at an input port, the second processed signal is supplied to another input port of the first summing means through another feedback loop including a switch which is turned on and turned off respectively during the recording mode and the reproduction mode of the video signal recording and/or reproducing apparatus, and the output preemphasis signal produced by the first summing means is supplied to the second subtracting means and at the same time branched to another output terminal. 
     
     
       10. A noise reduction circuit as claimed in claim 1 further comprising a feedback loop feeding back the high frequency signal component from the high pass filter means to the input port of the high pass filter means, said feed back loop comprising a second amplitude modifying means for producing in accordance with a predetermined amplitude characteristic an output signal responsive to an input signal applied thereto. 
     
     
       11. A noise reduction circuit as claimed in claim 10 in which said second amplitude modifying means is a limiter circuit having an amplitude characteristic which changes a gradient thereof forming two slopes of different gradient so as to have a predetermined slope succeeded by a substantially flat slope with an increase in amplitude of an input signal supplied thereto. 
     
     
       12. A noise reduction circuit as claimed in claim 11 in which said second amplitude modifying means is a limiter circuit having an amplitude characteristic which changes a gradient thereof forming more than three slopes of different gradient so as to have a predetermined slope, less steep slope, then substantially flat slope in succession with an increase in amplitude of an input signal supplied thereto. 
     
     
       13. A noise reduction circuit as claimed in claim 1 in which said first subtracting means is connected to the input terminal for receiving the input video signal at an input port thereof for a signal which is subjected to subtraction, said first summing means is connected to an output port of the first subtracting means and to an input port of the high pass filter means so as to receive the output signal from the first subtracting circuit at the input port and so as to supply the output signal to the high pass filter means from an output port of the first summing means, the second processed signal is supplied on the one hand to another input port of the first summing means and on the other hand to another port of the first subtraction means via a switch for a signal to be subtracted, said noise reduction circuit produces the preemphasis signal at an output port of the first summing means when the switch is opened and produces the deemphasis signal at the output port of the first subtracting means when the switch is closed. 
     
     
       14. A noise reduction circuit as claimed in claim 1 in which said first summing means is connected to the input terminal for receiving the input video signal at an input port thereof, said first subtracting means is connected to the first summing means and to the high pass filter means so as to receive the output signal from the first summing means at an input port of the first subtracting means for a signal subjected to subtraction and so as to supply the output signal to the high pass filter means from an output port of the first subtracting means, the second processed signal is supplied on one hand to an input port of the first subtracting means for a signal to be subtracted and on the other hand to another input port of the first summing means via a switch, said noise reduction circuit produces the preemphasis signal at an output port of the first summing means when the switch is closed and produces the deemphasis signal at the output port of the first subtracting means when the switch is opened. 
     
     
       15. A noise reduction circuit as claimed in claim 1 in which the high pass filter means has a time constant Ts determined such that   T >Ts >T/(X+1)     where T stands for a time constant corresponding to a frequency at which the preemphasis/and or deemphasis starts working and X stands for a parameter representing the degree of preemphasis/deemphasis.