Process for manufacturing thermal ink jet printhead and integrated circuit (IC) structures produced thereby

Abstract

A new and improved thermal ink jet printhead and fabrication process therefor are described. In one embodiment of this invention, heater resistors are formed on one area of an insulating substrate and relative large area electrical contacts are formed on an adjacent area of the insulating substrate. A barrier layer is formed over the conductive trace pattern defining the heater resistors on the one area, and a small via in this layer provides an electrical path between the large area electrical contacts and the conductive trace pattern, and thus provides a current drive path for the heater resistors. The small via provides minimum exposure of the barrier sidewall area and area of the conductive trace pattern and thus improves device reliability and fabrication yields and also improves electrical contact to the printhead. Alternatively, the barrier layer may be made less than laterally coextensive with the conductive trace material to thereby leave a small area of the trace material available for metal overlay connection to the large area contact pad which is formed to the side of the conductive trace material.

I claim: 
     
       1. A process for fabricating a thin film resistor printhead structure which includes: a. forming a resistive layer on an insulating substrate and a conductive trace pattern located on the resistive layer and having an opening therein defining a resistive heater element,   b. forming an insulating barrier layer atop said conductive trace pattern,   c. forming a via in said insulating barrier layer for receiving a metal overlay pattern in electrical contact with said conductive trace pattern said via having a geometry which exposes a predetermined area of said conductive trace pattern, and   d. extending said metal overlay pattern from said conductive trace pattern and through said via and down over an adjacent area of said insulating substrate, whereby the metal overlay pattern over said adjacent area of said insulating substrate provides a relatively large and flat electrical contact area remote from said conductive trace pattern for receiving a spring biased contact.   
     
     
       2. A thin film resistor printhead and interconnect structure including, in combination: a. a resistive layer and a conductive trace pattern formed on a predetermined area of an insulating substrate, and said conductive trace pattern having an opening therein defining a resistive heater element,   b. an insulating barrier layer formed atop said conductive trace pattern and having a surface geometry which exposes a predetermined area of said conductive trace pattern, and   c. a metal overlay pattern extending from said conductive trace pattern and down over and on an adjacent area of said insulating substrate under which no conductive trace pattern appears, whereby the metal over said adjacent area of said insulating substrate provides a relatively large and flat electrical contact area for receiving a spring biased contact.   
     
     
       3. The structure defined in claim 2 wherein a small via is made in said insulating barrier layer to expose said conductive trace pattern for connection to said metal overlay pattern. 
     
     
       4. The structure defined in claim 2 wherein said insulating barrier layer is formed of smaller lateral dimension than said conductive trace pattern to thereby leave an edge area of said conductive trace pattern exposed to receive said metal overlay pattern in electrical contact therewith. 
     
     
       5. A thin film interconnect structure including, in combination: a. a resistive layer and a conductive trace pattern formed thereon disposed on a predetermined area of an insulating substrate, and said conductive trace pattern having an opening therein defining a resistive transducer element,   b. an insulating barrier layer formed atop said conductive trace pattern and having a surface geometry which exposes a predetermined area of said conductive trace pattern, and   c. a metal overlay pattern extending from said predetermined area of said conductive trace pattern and down over and on an adjacent area of said insulating substrate under which no conductive trace pattern appears, whereby the metal on said adjacent area of said insulating substrate provides a relatively large and flat electrical contact area for receiving an electrical contact.